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broadcom: Refine expansion register access routine
This patch makes the expansion register access routines a little more formal. They will be used by the following bcm50610 support patch. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -128,36 +128,35 @@ static int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow, u16 val)
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MII_BCM54XX_SHD_DATA(val));
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}
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/*
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* Indirect register access functions for the Expansion Registers
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* and Secondary SerDes registers (when sec_serdes=1).
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*/
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static int bcm54xx_exp_read(struct phy_device *phydev,
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int sec_serdes, u8 regnum)
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/* Indirect register access functions for the Expansion Registers */
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static int bcm54xx_exp_read(struct phy_device *phydev, u8 regnum)
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{
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int val;
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phy_write(phydev, MII_BCM54XX_EXP_SEL,
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(sec_serdes ? MII_BCM54XX_EXP_SEL_SSD :
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MII_BCM54XX_EXP_SEL_ER) |
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regnum);
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val = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
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if (val < 0)
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return val;
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val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
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phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
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/* Restore default value. It's O.K. if this write fails. */
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phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
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return val;
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}
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static int bcm54xx_exp_write(struct phy_device *phydev,
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int sec_serdes, u8 regnum, u16 val)
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static int bcm54xx_exp_write(struct phy_device *phydev, u8 regnum, u16 val)
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{
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int ret;
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phy_write(phydev, MII_BCM54XX_EXP_SEL,
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(sec_serdes ? MII_BCM54XX_EXP_SEL_SSD :
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MII_BCM54XX_EXP_SEL_ER) |
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regnum);
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ret = phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
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if (ret < 0)
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return ret;
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ret = phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
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phy_write(phydev, MII_BCM54XX_EXP_SEL, regnum);
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/* Restore default value. It's O.K. if this write fails. */
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phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
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return ret;
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}
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@ -205,18 +204,27 @@ static int bcm5482_config_init(struct phy_device *phydev)
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/*
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* Enable SGMII slave mode and auto-detection
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*/
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reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_SGMII_SLAVE);
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bcm54xx_exp_write(phydev, 1, BCM5482_SSD_SGMII_SLAVE,
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reg |
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BCM5482_SSD_SGMII_SLAVE_EN |
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BCM5482_SSD_SGMII_SLAVE_AD);
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reg = BCM5482_SSD_SGMII_SLAVE | MII_BCM54XX_EXP_SEL_SSD;
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err = bcm54xx_exp_read(phydev, reg);
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if (err < 0)
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return err;
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err = bcm54xx_exp_write(phydev, reg, err |
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BCM5482_SSD_SGMII_SLAVE_EN |
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BCM5482_SSD_SGMII_SLAVE_AD);
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if (err < 0)
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return err;
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/*
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* Disable secondary SerDes powerdown
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*/
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reg = bcm54xx_exp_read(phydev, 1, BCM5482_SSD_1000BX_CTL);
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bcm54xx_exp_write(phydev, 1, BCM5482_SSD_1000BX_CTL,
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reg & ~BCM5482_SSD_1000BX_CTL_PWRDOWN);
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reg = BCM5482_SSD_1000BX_CTL | MII_BCM54XX_EXP_SEL_SSD;
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err = bcm54xx_exp_read(phydev, reg);
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if (err < 0)
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return err;
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err = bcm54xx_exp_write(phydev, reg,
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err & ~BCM5482_SSD_1000BX_CTL_PWRDOWN);
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if (err < 0)
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return err;
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/*
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* Select 1000BASE-X register set (primary SerDes)
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