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pinctrl: intel: Add support for 1k additional pull-down
The next generation Intel GPIO hardware supports additional 1k pull-down per-pad. Add support for this to the Intel core pinctrl driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -458,12 +458,14 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin,
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{
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{
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struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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enum pin_config_param param = pinconf_to_config_param(*config);
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enum pin_config_param param = pinconf_to_config_param(*config);
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const struct intel_community *community;
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u32 value, term;
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u32 value, term;
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u32 arg = 0;
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u32 arg = 0;
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if (!intel_pad_owned_by_host(pctrl, pin))
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if (!intel_pad_owned_by_host(pctrl, pin))
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return -ENOTSUPP;
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return -ENOTSUPP;
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community = intel_get_community(pctrl, pin);
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value = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
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value = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
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term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
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term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
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@ -499,6 +501,11 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin,
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return -EINVAL;
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return -EINVAL;
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switch (term) {
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switch (term) {
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case PADCFG1_TERM_1K:
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if (!(community->features & PINCTRL_FEATURE_1K_PD))
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return -EINVAL;
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arg = 1000;
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break;
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case PADCFG1_TERM_5K:
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case PADCFG1_TERM_5K:
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arg = 5000;
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arg = 5000;
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break;
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break;
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@ -540,6 +547,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
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{
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{
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unsigned param = pinconf_to_config_param(config);
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unsigned param = pinconf_to_config_param(config);
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unsigned arg = pinconf_to_config_argument(config);
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unsigned arg = pinconf_to_config_argument(config);
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const struct intel_community *community;
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void __iomem *padcfg1;
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void __iomem *padcfg1;
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unsigned long flags;
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unsigned long flags;
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int ret = 0;
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int ret = 0;
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@ -547,6 +555,7 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
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raw_spin_lock_irqsave(&pctrl->lock, flags);
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raw_spin_lock_irqsave(&pctrl->lock, flags);
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community = intel_get_community(pctrl, pin);
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padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
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padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
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value = readl(padcfg1);
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value = readl(padcfg1);
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@ -589,6 +598,11 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
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case 5000:
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case 5000:
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value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
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value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
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break;
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break;
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case 1000:
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if (!(community->features & PINCTRL_FEATURE_1K_PD))
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return -EINVAL;
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value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
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break;
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default:
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default:
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ret = -EINVAL;
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ret = -EINVAL;
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}
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}
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@ -1115,8 +1129,10 @@ int intel_pinctrl_probe(struct platform_device *pdev,
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u32 rev;
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u32 rev;
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rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;
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rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;
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if (rev >= 0x94)
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if (rev >= 0x94) {
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community->features |= PINCTRL_FEATURE_DEBOUNCE;
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community->features |= PINCTRL_FEATURE_DEBOUNCE;
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community->features |= PINCTRL_FEATURE_1K_PD;
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}
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}
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}
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/* Read offset of the pad configuration registers */
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/* Read offset of the pad configuration registers */
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@ -81,6 +81,7 @@ struct intel_community {
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/* Additional features supported by the hardware */
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/* Additional features supported by the hardware */
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#define PINCTRL_FEATURE_DEBOUNCE BIT(0)
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#define PINCTRL_FEATURE_DEBOUNCE BIT(0)
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#define PINCTRL_FEATURE_1K_PD BIT(1)
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#define PIN_GROUP(n, p, m) \
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#define PIN_GROUP(n, p, m) \
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{ \
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{ \
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