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mfd: tps65910: Fix wrong ack_base register
The interrupt status registers of TPS65910/1 should be cleared when the associated interrupt event occurs. This work is done in the regmap irq thread - using 'ack_base' register. The ACK registers should be fixed as status register, not mask registers. This patch fixes the infinite interrupt event problem by clearing interrupt status registers. Tested on the AM3517 Craneboard. Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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@ -211,7 +211,7 @@ static struct regmap_irq_chip tps65911_irq_chip = {
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.irq_reg_stride = 2,
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.status_base = TPS65910_INT_STS,
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.mask_base = TPS65910_INT_MSK,
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.ack_base = TPS65910_INT_MSK,
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.ack_base = TPS65910_INT_STS,
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};
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static struct regmap_irq_chip tps65910_irq_chip = {
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@ -222,7 +222,7 @@ static struct regmap_irq_chip tps65910_irq_chip = {
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.irq_reg_stride = 2,
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.status_base = TPS65910_INT_STS,
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.mask_base = TPS65910_INT_MSK,
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.ack_base = TPS65910_INT_MSK,
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.ack_base = TPS65910_INT_STS,
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};
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static int tps65910_irq_init(struct tps65910 *tps65910, int irq,
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