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mfd: tps65910: Fix wrong ack_base register

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The interrupt status registers of TPS65910/1 should be cleared
when the associated interrupt event occurs.
This work is done in the regmap irq thread - using 'ack_base' register.
The ACK registers should be fixed as status register, not mask registers.

This patch fixes the infinite interrupt event problem by clearing
interrupt status registers.

Tested on the AM3517 Craneboard.

Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Kim, Milo 2012-11-29 06:42:12 +00:00 committed by Samuel Ortiz
parent 0e5fca8106
commit 0582c0fafc
1 changed files with 2 additions and 2 deletions
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4
drivers/mfd/tps65910.c
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@ -211,7 +211,7 @@ static struct regmap_irq_chip tps65911_irq_chip = {
.irq_reg_stride = 2, .irq_reg_stride = 2,
.status_base = TPS65910_INT_STS, .status_base = TPS65910_INT_STS,
.mask_base = TPS65910_INT_MSK, .mask_base = TPS65910_INT_MSK,
.ack_base = TPS65910_INT_MSK, .ack_base = TPS65910_INT_STS,
}; };
static struct regmap_irq_chip tps65910_irq_chip = { static struct regmap_irq_chip tps65910_irq_chip = {
@ -222,7 +222,7 @@ static struct regmap_irq_chip tps65910_irq_chip = {
.irq_reg_stride = 2, .irq_reg_stride = 2,
.status_base = TPS65910_INT_STS, .status_base = TPS65910_INT_STS,
.mask_base = TPS65910_INT_MSK, .mask_base = TPS65910_INT_MSK,
.ack_base = TPS65910_INT_MSK, .ack_base = TPS65910_INT_STS,
}; };
static int tps65910_irq_init(struct tps65910 *tps65910, int irq, static int tps65910_irq_init(struct tps65910 *tps65910, int irq,