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dmaengine: mv_xor: Rename function for consistent naming
The current function names isn't very consistent, and functions with the same prefix might operate on either a channel or a descriptor, which is kind of confusing. Rename these functions to have a consistent and clearer naming scheme. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -104,7 +104,7 @@ static u32 mv_chan_get_intr_cause(struct mv_xor_chan *chan)
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return intr_cause;
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}
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static void mv_xor_device_clear_eoc_cause(struct mv_xor_chan *chan)
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static void mv_chan_clear_eoc_cause(struct mv_xor_chan *chan)
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{
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u32 val;
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@ -114,14 +114,14 @@ static void mv_xor_device_clear_eoc_cause(struct mv_xor_chan *chan)
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writel_relaxed(val, XOR_INTR_CAUSE(chan));
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}
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static void mv_xor_device_clear_err_status(struct mv_xor_chan *chan)
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static void mv_chan_clear_err_status(struct mv_xor_chan *chan)
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{
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u32 val = 0xFFFF0000 >> (chan->idx * 16);
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writel_relaxed(val, XOR_INTR_CAUSE(chan));
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}
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static void mv_set_mode(struct mv_xor_chan *chan,
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enum dma_transaction_type type)
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static void mv_chan_set_mode(struct mv_xor_chan *chan,
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enum dma_transaction_type type)
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{
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u32 op_mode;
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u32 config = readl_relaxed(XOR_CONFIG(chan));
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@ -172,12 +172,12 @@ static char mv_chan_is_busy(struct mv_xor_chan *chan)
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}
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/**
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* mv_xor_free_slots - flags descriptor slots for reuse
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* mv_chan_free_slots - flags descriptor slots for reuse
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* @slot: Slot to free
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* Caller must hold &mv_chan->lock while calling this function
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*/
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static void mv_xor_free_slots(struct mv_xor_chan *mv_chan,
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struct mv_xor_desc_slot *slot)
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static void mv_chan_free_slots(struct mv_xor_chan *mv_chan,
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struct mv_xor_desc_slot *slot)
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{
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dev_dbg(mv_chan_to_devp(mv_chan), "%s %d slot %p\n",
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__func__, __LINE__, slot);
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@ -187,12 +187,12 @@ static void mv_xor_free_slots(struct mv_xor_chan *mv_chan,
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}
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/*
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* mv_xor_start_new_chain - program the engine to operate on new chain headed by
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* sw_desc
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* mv_chan_start_new_chain - program the engine to operate on new
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* chain headed by sw_desc
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* Caller must hold &mv_chan->lock while calling this function
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*/
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static void mv_xor_start_new_chain(struct mv_xor_chan *mv_chan,
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struct mv_xor_desc_slot *sw_desc)
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static void mv_chan_start_new_chain(struct mv_xor_chan *mv_chan,
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struct mv_xor_desc_slot *sw_desc)
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{
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dev_dbg(mv_chan_to_devp(mv_chan), "%s %d: sw_desc %p\n",
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__func__, __LINE__, sw_desc);
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@ -205,8 +205,9 @@ static void mv_xor_start_new_chain(struct mv_xor_chan *mv_chan,
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}
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static dma_cookie_t
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mv_xor_run_tx_complete_actions(struct mv_xor_desc_slot *desc,
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struct mv_xor_chan *mv_chan, dma_cookie_t cookie)
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mv_desc_run_tx_complete_actions(struct mv_xor_desc_slot *desc,
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struct mv_xor_chan *mv_chan,
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dma_cookie_t cookie)
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{
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BUG_ON(desc->async_tx.cookie < 0);
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@ -230,7 +231,7 @@ mv_xor_run_tx_complete_actions(struct mv_xor_desc_slot *desc,
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}
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static int
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mv_xor_clean_completed_slots(struct mv_xor_chan *mv_chan)
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mv_chan_clean_completed_slots(struct mv_xor_chan *mv_chan)
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{
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struct mv_xor_desc_slot *iter, *_iter;
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@ -240,15 +241,15 @@ mv_xor_clean_completed_slots(struct mv_xor_chan *mv_chan)
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if (async_tx_test_ack(&iter->async_tx)) {
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list_del(&iter->completed_node);
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mv_xor_free_slots(mv_chan, iter);
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mv_chan_free_slots(mv_chan, iter);
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}
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}
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return 0;
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}
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static int
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mv_xor_clean_slot(struct mv_xor_desc_slot *desc,
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struct mv_xor_chan *mv_chan)
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mv_desc_clean_slot(struct mv_xor_desc_slot *desc,
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struct mv_xor_chan *mv_chan)
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{
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dev_dbg(mv_chan_to_devp(mv_chan), "%s %d: desc %p flags %d\n",
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__func__, __LINE__, desc, desc->async_tx.flags);
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@ -262,12 +263,12 @@ mv_xor_clean_slot(struct mv_xor_desc_slot *desc,
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return 0;
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}
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mv_xor_free_slots(mv_chan, desc);
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mv_chan_free_slots(mv_chan, desc);
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return 0;
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}
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/* This function must be called with the mv_xor_chan spinlock held */
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static void mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
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static void mv_chan_slot_cleanup(struct mv_xor_chan *mv_chan)
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{
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struct mv_xor_desc_slot *iter, *_iter;
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dma_cookie_t cookie = 0;
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@ -278,7 +279,7 @@ static void mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
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dev_dbg(mv_chan_to_devp(mv_chan), "%s %d\n", __func__, __LINE__);
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dev_dbg(mv_chan_to_devp(mv_chan), "current_desc %x\n", current_desc);
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mv_xor_clean_completed_slots(mv_chan);
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mv_chan_clean_completed_slots(mv_chan);
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/* free completed slots from the chain starting with
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* the oldest descriptor
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@ -290,11 +291,11 @@ static void mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
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/* clean finished descriptors */
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hw_desc = iter->hw_desc;
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if (hw_desc->status & XOR_DESC_SUCCESS) {
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cookie = mv_xor_run_tx_complete_actions(iter, mv_chan,
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cookie);
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cookie = mv_desc_run_tx_complete_actions(iter, mv_chan,
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cookie);
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/* done processing desc, clean slot */
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mv_xor_clean_slot(iter, mv_chan);
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mv_desc_clean_slot(iter, mv_chan);
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/* break if we did cleaned the current */
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if (iter->async_tx.phys == current_desc) {
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@ -318,7 +319,7 @@ static void mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
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iter = list_entry(mv_chan->chain.next,
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struct mv_xor_desc_slot,
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chain_node);
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mv_xor_start_new_chain(mv_chan, iter);
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mv_chan_start_new_chain(mv_chan, iter);
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} else {
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if (!list_is_last(&iter->chain_node, &mv_chan->chain)) {
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/*
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@ -328,7 +329,7 @@ static void mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
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iter = list_entry(iter->chain_node.next,
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struct mv_xor_desc_slot,
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chain_node);
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mv_xor_start_new_chain(mv_chan, iter);
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mv_chan_start_new_chain(mv_chan, iter);
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} else {
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/*
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* some descriptors are still waiting
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@ -348,12 +349,12 @@ static void mv_xor_tasklet(unsigned long data)
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struct mv_xor_chan *chan = (struct mv_xor_chan *) data;
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spin_lock_bh(&chan->lock);
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mv_xor_slot_cleanup(chan);
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mv_chan_slot_cleanup(chan);
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spin_unlock_bh(&chan->lock);
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}
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static struct mv_xor_desc_slot *
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mv_xor_alloc_slot(struct mv_xor_chan *mv_chan)
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mv_chan_alloc_slot(struct mv_xor_chan *mv_chan)
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{
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struct mv_xor_desc_slot *iter, *_iter;
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int retry = 0;
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@ -451,7 +452,7 @@ mv_xor_tx_submit(struct dma_async_tx_descriptor *tx)
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}
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if (new_hw_chain)
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mv_xor_start_new_chain(mv_chan, sw_desc);
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mv_chan_start_new_chain(mv_chan, sw_desc);
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spin_unlock_bh(&mv_chan->lock);
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@ -524,7 +525,7 @@ mv_xor_prep_dma_xor(struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
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__func__, src_cnt, len, &dest, flags);
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spin_lock_bh(&mv_chan->lock);
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sw_desc = mv_xor_alloc_slot(mv_chan);
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sw_desc = mv_chan_alloc_slot(mv_chan);
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if (sw_desc) {
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sw_desc->type = DMA_XOR;
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sw_desc->async_tx.flags = flags;
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@ -576,7 +577,7 @@ static void mv_xor_free_chan_resources(struct dma_chan *chan)
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spin_lock_bh(&mv_chan->lock);
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mv_xor_slot_cleanup(mv_chan);
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mv_chan_slot_cleanup(mv_chan);
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list_for_each_entry_safe(iter, _iter, &mv_chan->chain,
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chain_node) {
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@ -623,13 +624,13 @@ static enum dma_status mv_xor_status(struct dma_chan *chan,
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return ret;
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spin_lock_bh(&mv_chan->lock);
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mv_xor_slot_cleanup(mv_chan);
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mv_chan_slot_cleanup(mv_chan);
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spin_unlock_bh(&mv_chan->lock);
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return dma_cookie_status(chan, cookie, txstate);
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}
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static void mv_dump_xor_regs(struct mv_xor_chan *chan)
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static void mv_chan_dump_regs(struct mv_xor_chan *chan)
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{
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u32 val;
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@ -652,8 +653,8 @@ static void mv_dump_xor_regs(struct mv_xor_chan *chan)
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dev_err(mv_chan_to_devp(chan), "error addr 0x%08x\n", val);
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}
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static void mv_xor_err_interrupt_handler(struct mv_xor_chan *chan,
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u32 intr_cause)
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static void mv_chan_err_interrupt_handler(struct mv_xor_chan *chan,
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u32 intr_cause)
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{
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if (intr_cause & XOR_INT_ERR_DECODE) {
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dev_dbg(mv_chan_to_devp(chan), "ignoring address decode error\n");
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@ -663,7 +664,7 @@ static void mv_xor_err_interrupt_handler(struct mv_xor_chan *chan,
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dev_err(mv_chan_to_devp(chan), "error on chan %d. intr cause 0x%08x\n",
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chan->idx, intr_cause);
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mv_dump_xor_regs(chan);
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mv_chan_dump_regs(chan);
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WARN_ON(1);
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}
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@ -675,11 +676,11 @@ static irqreturn_t mv_xor_interrupt_handler(int irq, void *data)
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dev_dbg(mv_chan_to_devp(chan), "intr cause %x\n", intr_cause);
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if (intr_cause & XOR_INTR_ERRORS)
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mv_xor_err_interrupt_handler(chan, intr_cause);
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mv_chan_err_interrupt_handler(chan, intr_cause);
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tasklet_schedule(&chan->irq_tasklet);
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mv_xor_device_clear_eoc_cause(chan);
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mv_chan_clear_eoc_cause(chan);
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return IRQ_HANDLED;
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}
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@ -698,7 +699,7 @@ static void mv_xor_issue_pending(struct dma_chan *chan)
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* Perform a transaction to verify the HW works.
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*/
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static int mv_xor_memcpy_self_test(struct mv_xor_chan *mv_chan)
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static int mv_chan_memcpy_self_test(struct mv_xor_chan *mv_chan)
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{
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int i, ret;
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void *src, *dest;
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@ -807,7 +808,7 @@ out:
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#define MV_XOR_NUM_SRC_TEST 4 /* must be <= 15 */
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static int
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mv_xor_xor_self_test(struct mv_xor_chan *mv_chan)
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mv_chan_xor_self_test(struct mv_xor_chan *mv_chan)
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{
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int i, src_idx, ret;
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struct page *dest;
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@ -1034,7 +1035,7 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
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mv_chan);
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/* clear errors before enabling interrupts */
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mv_xor_device_clear_err_status(mv_chan);
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mv_chan_clear_err_status(mv_chan);
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ret = request_irq(mv_chan->irq, mv_xor_interrupt_handler,
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0, dev_name(&pdev->dev), mv_chan);
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@ -1043,7 +1044,7 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
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mv_chan_unmask_interrupts(mv_chan);
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mv_set_mode(mv_chan, DMA_XOR);
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mv_chan_set_mode(mv_chan, DMA_XOR);
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spin_lock_init(&mv_chan->lock);
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INIT_LIST_HEAD(&mv_chan->chain);
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@ -1055,14 +1056,14 @@ mv_xor_channel_add(struct mv_xor_device *xordev,
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list_add_tail(&mv_chan->dmachan.device_node, &dma_dev->channels);
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if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
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ret = mv_xor_memcpy_self_test(mv_chan);
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ret = mv_chan_memcpy_self_test(mv_chan);
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dev_dbg(&pdev->dev, "memcpy self test returned %d\n", ret);
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if (ret)
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goto err_free_irq;
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}
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if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
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ret = mv_xor_xor_self_test(mv_chan);
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ret = mv_chan_xor_self_test(mv_chan);
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dev_dbg(&pdev->dev, "xor self test returned %d\n", ret);
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if (ret)
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goto err_free_irq;
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