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mISDN: avmfritz use the bigger fifo of chip version 2
If we detect the latest hardware revision we should use the bigger fifo to avoid TX underruns and have less interrupts. TX underruns should be logged as warning. Signed-off-by: Karsten Keil <kkeil@linux-pingi.de> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Karsten Keil
David S. Miller
parent
8bfddfbe21
commit
09e79a777a
@ -30,7 +30,7 @@
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#include "ipac.h"
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#define AVMFRITZ_REV "2.1"
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#define AVMFRITZ_REV "2.2"
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static int AVM_cnt;
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static int debug;
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@ -69,6 +69,7 @@ enum {
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#define HDLC_MODE_TRANS 0x02
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#define HDLC_MODE_CCR_7 0x04
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#define HDLC_MODE_CCR_16 0x08
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#define HDLC_FIFO_SIZE_128 0x20
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#define HDLC_MODE_TESTLOOP 0x80
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#define HDLC_INT_XPR 0x80
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@ -80,13 +81,16 @@ enum {
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#define HDLC_STAT_RDO 0x10
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#define HDLC_STAT_CRCVFRRAB 0x0E
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#define HDLC_STAT_CRCVFR 0x06
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#define HDLC_STAT_RML_MASK 0x3f00
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#define HDLC_STAT_RML_MASK_V1 0x3f00
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#define HDLC_STAT_RML_MASK_V2 0x7f00
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#define HDLC_CMD_XRS 0x80
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#define HDLC_CMD_XME 0x01
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#define HDLC_CMD_RRS 0x20
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#define HDLC_CMD_XML_MASK 0x3f00
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#define HDLC_FIFO_SIZE 32
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#define HDLC_FIFO_SIZE_V1 32
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#define HDLC_FIFO_SIZE_V2 128
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/* Fritz PCI v2.0 */
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@ -346,11 +350,14 @@ modehdlc(struct bchannel *bch, int protocol)
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{
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struct fritzcard *fc = bch->hw;
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struct hdlc_hw *hdlc;
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u8 mode;
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hdlc = &fc->hdlc[(bch->nr - 1) & 1];
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pr_debug("%s: hdlc %c protocol %x-->%x ch %d\n", fc->name,
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'@' + bch->nr, bch->state, protocol, bch->nr);
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hdlc->ctrl.ctrl = 0;
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mode = (fc->type == AVM_FRITZ_PCIV2) ? HDLC_FIFO_SIZE_128 : 0;
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switch (protocol) {
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case -1: /* used for init */
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bch->state = -1;
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@ -358,7 +365,7 @@ modehdlc(struct bchannel *bch, int protocol)
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if (bch->state == ISDN_P_NONE)
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break;
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hdlc->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
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hdlc->ctrl.sr.mode = HDLC_MODE_TRANS;
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hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
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write_ctrl(bch, 5);
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bch->state = ISDN_P_NONE;
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test_and_clear_bit(FLG_HDLC, &bch->Flags);
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@ -367,7 +374,7 @@ modehdlc(struct bchannel *bch, int protocol)
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case ISDN_P_B_RAW:
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bch->state = protocol;
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hdlc->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
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hdlc->ctrl.sr.mode = HDLC_MODE_TRANS;
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hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
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write_ctrl(bch, 5);
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hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
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write_ctrl(bch, 1);
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@ -377,7 +384,7 @@ modehdlc(struct bchannel *bch, int protocol)
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case ISDN_P_B_HDLC:
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bch->state = protocol;
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hdlc->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
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hdlc->ctrl.sr.mode = HDLC_MODE_ITF_FLG;
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hdlc->ctrl.sr.mode = mode | HDLC_MODE_ITF_FLG;
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write_ctrl(bch, 5);
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hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
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write_ctrl(bch, 1);
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@ -416,7 +423,7 @@ hdlc_empty_fifo(struct bchannel *bch, int count)
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}
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p = skb_put(bch->rx_skb, count);
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ptr = (u32 *)p;
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if (AVM_FRITZ_PCIV2 == fc->type)
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if (fc->type == AVM_FRITZ_PCIV2)
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addr = fc->addr + (bch->nr == 2 ?
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AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
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else {
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@ -441,7 +448,7 @@ hdlc_fill_fifo(struct bchannel *bch)
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{
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struct fritzcard *fc = bch->hw;
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struct hdlc_hw *hdlc;
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int count, cnt = 0;
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int count, fs, cnt = 0;
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u8 *p;
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u32 *ptr, val, addr;
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@ -451,10 +458,12 @@ hdlc_fill_fifo(struct bchannel *bch)
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count = bch->tx_skb->len - bch->tx_idx;
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if (count <= 0)
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return;
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fs = (fc->type == AVM_FRITZ_PCIV2) ?
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HDLC_FIFO_SIZE_V2 : HDLC_FIFO_SIZE_V1;
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p = bch->tx_skb->data + bch->tx_idx;
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hdlc->ctrl.sr.cmd &= ~HDLC_CMD_XME;
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if (count > HDLC_FIFO_SIZE) {
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count = HDLC_FIFO_SIZE;
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if (count > fs) {
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count = fs;
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} else {
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if (test_bit(FLG_HDLC, &bch->Flags))
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hdlc->ctrl.sr.cmd |= HDLC_CMD_XME;
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@ -463,8 +472,8 @@ hdlc_fill_fifo(struct bchannel *bch)
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bch->tx_idx, bch->tx_skb->len);
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ptr = (u32 *)p;
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bch->tx_idx += count;
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hdlc->ctrl.sr.xml = ((count == HDLC_FIFO_SIZE) ? 0 : count);
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if (AVM_FRITZ_PCIV2 == fc->type) {
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hdlc->ctrl.sr.xml = ((count == fs) ? 0 : count);
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if (fc->type == AVM_FRITZ_PCIV2) {
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__write_ctrl_pciv2(fc, hdlc, bch->nr);
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addr = fc->addr + (bch->nr == 2 ?
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AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
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@ -502,13 +511,23 @@ static void
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HDLC_irq(struct bchannel *bch, u32 stat)
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{
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struct fritzcard *fc = bch->hw;
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int len;
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int len, fs;
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u32 rmlMask;
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struct hdlc_hw *hdlc;
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hdlc = &fc->hdlc[(bch->nr - 1) & 1];
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pr_debug("%s: ch%d stat %#x\n", fc->name, bch->nr, stat);
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if (fc->type == AVM_FRITZ_PCIV2) {
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rmlMask = HDLC_STAT_RML_MASK_V2;
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fs = HDLC_FIFO_SIZE_V2;
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} else {
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rmlMask = HDLC_STAT_RML_MASK_V1;
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fs = HDLC_FIFO_SIZE_V1;
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}
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if (stat & HDLC_INT_RPR) {
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if (stat & HDLC_STAT_RDO) {
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pr_warning("%s: ch%d stat %x RDO\n",
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fc->name, bch->nr, stat);
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hdlc->ctrl.sr.xml = 0;
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hdlc->ctrl.sr.cmd |= HDLC_CMD_RRS;
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write_ctrl(bch, 1);
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@ -517,21 +536,21 @@ HDLC_irq(struct bchannel *bch, u32 stat)
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if (bch->rx_skb)
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skb_trim(bch->rx_skb, 0);
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} else {
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len = (stat & HDLC_STAT_RML_MASK) >> 8;
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len = (stat & rmlMask) >> 8;
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if (!len)
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len = 32;
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len = fs;
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hdlc_empty_fifo(bch, len);
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if (!bch->rx_skb)
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goto handle_tx;
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if ((stat & HDLC_STAT_RME) || test_bit(FLG_TRANSPARENT,
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&bch->Flags)) {
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if (test_bit(FLG_TRANSPARENT, &bch->Flags) ||
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(stat & HDLC_STAT_RME)) {
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if (((stat & HDLC_STAT_CRCVFRRAB) ==
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HDLC_STAT_CRCVFR) ||
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test_bit(FLG_TRANSPARENT, &bch->Flags)) {
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recv_Bchannel(bch, 0);
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} else {
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pr_debug("%s: got invalid frame\n",
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fc->name);
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pr_warning("%s: got invalid frame\n",
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fc->name);
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skb_trim(bch->rx_skb, 0);
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}
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}
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@ -543,13 +562,8 @@ handle_tx:
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* restart transmitting the whole frame on HDLC
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* in transparent mode we send the next data
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*/
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if (bch->tx_skb)
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pr_debug("%s: ch%d XDU len(%d) idx(%d) Flags(%lx)\n",
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fc->name, bch->nr, bch->tx_skb->len,
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bch->tx_idx, bch->Flags);
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else
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pr_debug("%s: ch%d XDU no tx_skb Flags(%lx)\n",
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fc->name, bch->nr, bch->Flags);
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pr_warning("%s: ch%d stat %x XDU %s\n", fc->name, bch->nr,
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stat, bch->tx_skb ? "tx_skb" : "no tx_skb");
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if (bch->tx_skb && bch->tx_skb->len) {
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if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
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bch->tx_idx = 0;
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@ -774,7 +788,7 @@ init_card(struct fritzcard *fc)
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inithdlc(fc);
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enable_hwirq(fc);
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/* RESET Receiver and Transmitter */
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if (AVM_FRITZ_PCIV2 == fc->type) {
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if (fc->type == AVM_FRITZ_PCIV2) {
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WriteISAC_V2(fc, ISACX_MASK, 0);
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WriteISAC_V2(fc, ISACX_CMDRD, 0x41);
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} else {
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