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Davinci: tnetv107x pin list
Added list of muxed pins on the tnetv107x SOC. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Cyril Chemparathy
Kevin Hilman
parent
3821d10a53
commit
0e23f71d60
@ -904,6 +904,275 @@ enum davinci_da850_index {
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DA850_RTC_ALARM,
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};
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enum davinci_tnetv107x_index {
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TNETV107X_ASR_A00,
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TNETV107X_GPIO32,
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TNETV107X_ASR_A01,
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TNETV107X_GPIO33,
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TNETV107X_ASR_A02,
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TNETV107X_GPIO34,
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TNETV107X_ASR_A03,
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TNETV107X_GPIO35,
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TNETV107X_ASR_A04,
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TNETV107X_GPIO36,
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TNETV107X_ASR_A05,
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TNETV107X_GPIO37,
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TNETV107X_ASR_A06,
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TNETV107X_GPIO38,
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TNETV107X_ASR_A07,
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TNETV107X_GPIO39,
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TNETV107X_ASR_A08,
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TNETV107X_GPIO40,
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TNETV107X_ASR_A09,
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TNETV107X_GPIO41,
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TNETV107X_ASR_A10,
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TNETV107X_GPIO42,
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TNETV107X_ASR_A11,
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TNETV107X_BOOT_STRP_0,
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TNETV107X_ASR_A12,
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TNETV107X_BOOT_STRP_1,
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TNETV107X_ASR_A13,
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TNETV107X_GPIO43,
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TNETV107X_ASR_A14,
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TNETV107X_GPIO44,
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TNETV107X_ASR_A15,
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TNETV107X_GPIO45,
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TNETV107X_ASR_A16,
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TNETV107X_GPIO46,
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TNETV107X_ASR_A17,
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TNETV107X_GPIO47,
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TNETV107X_ASR_A18,
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TNETV107X_GPIO48,
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TNETV107X_SDIO1_DATA3_0,
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TNETV107X_ASR_A19,
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TNETV107X_GPIO49,
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TNETV107X_SDIO1_DATA2_0,
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TNETV107X_ASR_A20,
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TNETV107X_GPIO50,
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TNETV107X_SDIO1_DATA1_0,
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TNETV107X_ASR_A21,
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TNETV107X_GPIO51,
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TNETV107X_SDIO1_DATA0_0,
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TNETV107X_ASR_A22,
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TNETV107X_GPIO52,
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TNETV107X_SDIO1_CMD_0,
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TNETV107X_ASR_A23,
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TNETV107X_GPIO53,
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TNETV107X_SDIO1_CLK_0,
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TNETV107X_ASR_BA_1,
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TNETV107X_GPIO54,
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TNETV107X_SYS_PLL_CLK,
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TNETV107X_ASR_CS0,
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TNETV107X_ASR_CS1,
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TNETV107X_ASR_CS2,
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TNETV107X_TDM_PLL_CLK,
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TNETV107X_ASR_CS3,
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TNETV107X_ETH_PHY_CLK,
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TNETV107X_ASR_D00,
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TNETV107X_GPIO55,
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TNETV107X_ASR_D01,
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TNETV107X_GPIO56,
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TNETV107X_ASR_D02,
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TNETV107X_GPIO57,
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TNETV107X_ASR_D03,
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TNETV107X_GPIO58,
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TNETV107X_ASR_D04,
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TNETV107X_GPIO59_0,
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TNETV107X_ASR_D05,
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TNETV107X_GPIO60_0,
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TNETV107X_ASR_D06,
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TNETV107X_GPIO61_0,
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TNETV107X_ASR_D07,
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TNETV107X_GPIO62_0,
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TNETV107X_ASR_D08,
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TNETV107X_GPIO63_0,
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TNETV107X_ASR_D09,
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TNETV107X_GPIO64_0,
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TNETV107X_ASR_D10,
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TNETV107X_SDIO1_DATA3_1,
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TNETV107X_ASR_D11,
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TNETV107X_SDIO1_DATA2_1,
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TNETV107X_ASR_D12,
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TNETV107X_SDIO1_DATA1_1,
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TNETV107X_ASR_D13,
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TNETV107X_SDIO1_DATA0_1,
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TNETV107X_ASR_D14,
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TNETV107X_SDIO1_CMD_1,
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TNETV107X_ASR_D15,
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TNETV107X_SDIO1_CLK_1,
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TNETV107X_ASR_OE,
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TNETV107X_BOOT_STRP_2,
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TNETV107X_ASR_RNW,
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TNETV107X_GPIO29_0,
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TNETV107X_ASR_WAIT,
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TNETV107X_GPIO30_0,
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TNETV107X_ASR_WE,
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TNETV107X_BOOT_STRP_3,
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TNETV107X_ASR_WE_DQM0,
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TNETV107X_GPIO31,
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TNETV107X_LCD_PD17_0,
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TNETV107X_ASR_WE_DQM1,
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TNETV107X_ASR_BA0_0,
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TNETV107X_VLYNQ_CLK,
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TNETV107X_GPIO14,
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TNETV107X_LCD_PD19_0,
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TNETV107X_VLYNQ_RXD0,
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TNETV107X_GPIO15,
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TNETV107X_LCD_PD20_0,
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TNETV107X_VLYNQ_RXD1,
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TNETV107X_GPIO16,
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TNETV107X_LCD_PD21_0,
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TNETV107X_VLYNQ_TXD0,
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TNETV107X_GPIO17,
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TNETV107X_LCD_PD22_0,
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TNETV107X_VLYNQ_TXD1,
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TNETV107X_GPIO18,
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TNETV107X_LCD_PD23_0,
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TNETV107X_SDIO0_CLK,
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TNETV107X_GPIO19,
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TNETV107X_SDIO0_CMD,
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TNETV107X_GPIO20,
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TNETV107X_SDIO0_DATA0,
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TNETV107X_GPIO21,
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TNETV107X_SDIO0_DATA1,
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TNETV107X_GPIO22,
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TNETV107X_SDIO0_DATA2,
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TNETV107X_GPIO23,
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TNETV107X_SDIO0_DATA3,
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TNETV107X_GPIO24,
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TNETV107X_EMU0,
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TNETV107X_EMU1,
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TNETV107X_RTCK,
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TNETV107X_TRST_N,
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TNETV107X_TCK,
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TNETV107X_TDI,
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TNETV107X_TDO,
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TNETV107X_TMS,
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TNETV107X_TDM1_CLK,
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TNETV107X_TDM1_RX,
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TNETV107X_TDM1_TX,
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TNETV107X_TDM1_FS,
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TNETV107X_KEYPAD_R0,
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TNETV107X_KEYPAD_R1,
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TNETV107X_KEYPAD_R2,
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TNETV107X_KEYPAD_R3,
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TNETV107X_KEYPAD_R4,
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TNETV107X_KEYPAD_R5,
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TNETV107X_KEYPAD_R6,
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TNETV107X_GPIO12,
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TNETV107X_KEYPAD_R7,
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TNETV107X_GPIO10,
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TNETV107X_KEYPAD_C0,
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TNETV107X_KEYPAD_C1,
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TNETV107X_KEYPAD_C2,
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TNETV107X_KEYPAD_C3,
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TNETV107X_KEYPAD_C4,
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TNETV107X_KEYPAD_C5,
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TNETV107X_KEYPAD_C6,
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TNETV107X_GPIO13,
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TNETV107X_TEST_CLK_IN,
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TNETV107X_KEYPAD_C7,
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TNETV107X_GPIO11,
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TNETV107X_SSP0_0,
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TNETV107X_SCC_DCLK,
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TNETV107X_LCD_PD20_1,
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TNETV107X_SSP0_1,
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TNETV107X_SCC_CS_N,
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TNETV107X_LCD_PD21_1,
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TNETV107X_SSP0_2,
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TNETV107X_SCC_D,
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TNETV107X_LCD_PD22_1,
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TNETV107X_SSP0_3,
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TNETV107X_SCC_RESETN,
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TNETV107X_LCD_PD23_1,
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TNETV107X_SSP1_0,
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TNETV107X_GPIO25,
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TNETV107X_UART2_CTS,
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TNETV107X_SSP1_1,
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TNETV107X_GPIO26,
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TNETV107X_UART2_RD,
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TNETV107X_SSP1_2,
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TNETV107X_GPIO27,
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TNETV107X_UART2_RTS,
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TNETV107X_SSP1_3,
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TNETV107X_GPIO28,
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TNETV107X_UART2_TD,
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TNETV107X_UART0_CTS,
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TNETV107X_UART0_RD,
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TNETV107X_UART0_RTS,
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TNETV107X_UART0_TD,
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TNETV107X_UART1_RD,
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TNETV107X_UART1_TD,
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TNETV107X_LCD_AC_NCS,
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TNETV107X_LCD_HSYNC_RNW,
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TNETV107X_LCD_VSYNC_A0,
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TNETV107X_LCD_MCLK,
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TNETV107X_LCD_PD16_0,
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TNETV107X_LCD_PCLK_E,
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TNETV107X_LCD_PD00,
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TNETV107X_LCD_PD01,
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TNETV107X_LCD_PD02,
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TNETV107X_LCD_PD03,
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TNETV107X_LCD_PD04,
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TNETV107X_LCD_PD05,
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TNETV107X_LCD_PD06,
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TNETV107X_LCD_PD07,
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TNETV107X_LCD_PD08,
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TNETV107X_GPIO59_1,
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TNETV107X_LCD_PD09,
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TNETV107X_GPIO60_1,
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TNETV107X_LCD_PD10,
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TNETV107X_ASR_BA0_1,
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TNETV107X_GPIO61_1,
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TNETV107X_LCD_PD11,
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TNETV107X_GPIO62_1,
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TNETV107X_LCD_PD12,
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TNETV107X_GPIO63_1,
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TNETV107X_LCD_PD13,
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TNETV107X_GPIO64_1,
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TNETV107X_LCD_PD14,
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TNETV107X_GPIO29_1,
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TNETV107X_LCD_PD15,
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TNETV107X_GPIO30_1,
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TNETV107X_EINT0,
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TNETV107X_GPIO08,
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TNETV107X_EINT1,
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TNETV107X_GPIO09,
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TNETV107X_GPIO00,
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TNETV107X_LCD_PD20_2,
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TNETV107X_TDM_CLK_IN_2,
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TNETV107X_GPIO01,
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TNETV107X_LCD_PD21_2,
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TNETV107X_24M_CLK_OUT_1,
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TNETV107X_GPIO02,
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TNETV107X_LCD_PD22_2,
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TNETV107X_GPIO03,
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TNETV107X_LCD_PD23_2,
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TNETV107X_GPIO04,
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TNETV107X_LCD_PD16_1,
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TNETV107X_USB0_RXERR,
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TNETV107X_GPIO05,
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TNETV107X_LCD_PD17_1,
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TNETV107X_TDM_CLK_IN_1,
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TNETV107X_GPIO06,
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TNETV107X_LCD_PD18,
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TNETV107X_24M_CLK_OUT_2,
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TNETV107X_GPIO07,
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TNETV107X_LCD_PD19_1,
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TNETV107X_USB1_RXERR,
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TNETV107X_ETH_PLL_CLK,
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TNETV107X_MDIO,
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TNETV107X_MDC,
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TNETV107X_AIC_MUTE_STAT_N,
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TNETV107X_TDM0_CLK,
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TNETV107X_AIC_HNS_EN_N,
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TNETV107X_TDM0_FS,
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TNETV107X_AIC_HDS_EN_STAT_N,
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TNETV107X_TDM0_TX,
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TNETV107X_AIC_HNF_EN_STAT_N,
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TNETV107X_TDM0_RX,
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};
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#ifdef CONFIG_DAVINCI_MUX
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/* setup pin muxing */
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extern int davinci_cfg_reg(unsigned long reg_cfg);
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