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ntb_hw_amd: Style fixes: open code macros that just obfuscate code
As per a comments in [1] by Greg Kroah-Hartman, the ndev_* macros should be cleaned up. This makes it more clear what's actually going on when reading the code. [1] http://www.spinics.net/lists/linux-pci/msg56904.html Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
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@ -133,7 +133,7 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
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if (bar < 0)
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return bar;
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mw_size = pci_resource_len(ndev->ntb.pdev, bar);
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mw_size = pci_resource_len(ntb->pdev, bar);
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/* make sure the range fits in the usable mw size */
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if (size > mw_size)
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@ -142,7 +142,7 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
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mmio = ndev->self_mmio;
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peer_mmio = ndev->peer_mmio;
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base_addr = pci_resource_start(ndev->ntb.pdev, bar);
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base_addr = pci_resource_start(ntb->pdev, bar);
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if (bar != 1) {
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xlat_reg = AMD_BAR23XLAT_OFFSET + ((bar - 2) << 2);
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@ -232,7 +232,7 @@ static u64 amd_ntb_link_is_up(struct ntb_dev *ntb,
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if (width)
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*width = NTB_LNK_STA_WIDTH(ndev->lnk_sta);
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dev_dbg(ndev_dev(ndev), "link is up.\n");
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dev_dbg(&ntb->pdev->dev, "link is up.\n");
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ret = 1;
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} else {
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@ -241,7 +241,7 @@ static u64 amd_ntb_link_is_up(struct ntb_dev *ntb,
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if (width)
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*width = NTB_WIDTH_NONE;
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dev_dbg(ndev_dev(ndev), "link is down.\n");
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dev_dbg(&ntb->pdev->dev, "link is down.\n");
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}
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return ret;
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@ -261,7 +261,7 @@ static int amd_ntb_link_enable(struct ntb_dev *ntb,
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if (ndev->ntb.topo == NTB_TOPO_SEC)
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return -EINVAL;
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dev_dbg(ndev_dev(ndev), "Enabling Link.\n");
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dev_dbg(&ntb->pdev->dev, "Enabling Link.\n");
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ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
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ntb_ctl |= (PMM_REG_CTL | SMM_REG_CTL);
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@ -282,7 +282,7 @@ static int amd_ntb_link_disable(struct ntb_dev *ntb)
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if (ndev->ntb.topo == NTB_TOPO_SEC)
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return -EINVAL;
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dev_dbg(ndev_dev(ndev), "Enabling Link.\n");
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dev_dbg(&ntb->pdev->dev, "Enabling Link.\n");
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ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);
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ntb_ctl &= ~(PMM_REG_CTL | SMM_REG_CTL);
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@ -500,18 +500,19 @@ static void amd_ack_smu(struct amd_ntb_dev *ndev, u32 bit)
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static void amd_handle_event(struct amd_ntb_dev *ndev, int vec)
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{
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void __iomem *mmio = ndev->self_mmio;
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struct device *dev = &ndev->ntb.pdev->dev;
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u32 status;
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status = readl(mmio + AMD_INTSTAT_OFFSET);
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if (!(status & AMD_EVENT_INTMASK))
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return;
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dev_dbg(ndev_dev(ndev), "status = 0x%x and vec = %d\n", status, vec);
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dev_dbg(dev, "status = 0x%x and vec = %d\n", status, vec);
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status &= AMD_EVENT_INTMASK;
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switch (status) {
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case AMD_PEER_FLUSH_EVENT:
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dev_info(ndev_dev(ndev), "Flush is done.\n");
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dev_info(dev, "Flush is done.\n");
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break;
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case AMD_PEER_RESET_EVENT:
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amd_ack_smu(ndev, AMD_PEER_RESET_EVENT);
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@ -537,7 +538,7 @@ static void amd_handle_event(struct amd_ntb_dev *ndev, int vec)
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status = readl(mmio + AMD_PMESTAT_OFFSET);
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/* check if this is WAKEUP event */
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if (status & 0x1)
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dev_info(ndev_dev(ndev), "Wakeup is done.\n");
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dev_info(dev, "Wakeup is done.\n");
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amd_ack_smu(ndev, AMD_PEER_D0_EVENT);
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@ -546,14 +547,14 @@ static void amd_handle_event(struct amd_ntb_dev *ndev, int vec)
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AMD_LINK_HB_TIMEOUT);
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break;
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default:
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dev_info(ndev_dev(ndev), "event status = 0x%x.\n", status);
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dev_info(dev, "event status = 0x%x.\n", status);
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break;
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}
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}
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static irqreturn_t ndev_interrupt(struct amd_ntb_dev *ndev, int vec)
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{
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dev_dbg(ndev_dev(ndev), "vec %d\n", vec);
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dev_dbg(&ndev->ntb.pdev->dev, "vec %d\n", vec);
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if (vec > (AMD_DB_CNT - 1) || (ndev->msix_vec_count == 1))
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amd_handle_event(ndev, vec);
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@ -575,7 +576,7 @@ static irqreturn_t ndev_irq_isr(int irq, void *dev)
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{
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struct amd_ntb_dev *ndev = dev;
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return ndev_interrupt(ndev, irq - ndev_pdev(ndev)->irq);
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return ndev_interrupt(ndev, irq - ndev->ntb.pdev->irq);
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}
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static int ndev_init_isr(struct amd_ntb_dev *ndev,
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@ -584,7 +585,7 @@ static int ndev_init_isr(struct amd_ntb_dev *ndev,
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struct pci_dev *pdev;
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int rc, i, msix_count, node;
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pdev = ndev_pdev(ndev);
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pdev = ndev->ntb.pdev;
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node = dev_to_node(&pdev->dev);
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@ -626,7 +627,7 @@ static int ndev_init_isr(struct amd_ntb_dev *ndev,
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goto err_msix_request;
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}
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dev_dbg(ndev_dev(ndev), "Using msix interrupts\n");
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dev_dbg(&pdev->dev, "Using msix interrupts\n");
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ndev->db_count = msix_min;
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ndev->msix_vec_count = msix_max;
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return 0;
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@ -653,7 +654,7 @@ err_msix_vec_alloc:
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if (rc)
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goto err_msi_request;
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dev_dbg(ndev_dev(ndev), "Using msi interrupts\n");
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dev_dbg(&pdev->dev, "Using msi interrupts\n");
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ndev->db_count = 1;
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ndev->msix_vec_count = 1;
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return 0;
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@ -670,7 +671,7 @@ err_msi_enable:
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if (rc)
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goto err_intx_request;
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dev_dbg(ndev_dev(ndev), "Using intx interrupts\n");
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dev_dbg(&pdev->dev, "Using intx interrupts\n");
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ndev->db_count = 1;
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ndev->msix_vec_count = 1;
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return 0;
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@ -685,7 +686,7 @@ static void ndev_deinit_isr(struct amd_ntb_dev *ndev)
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void __iomem *mmio = ndev->self_mmio;
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int i;
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pdev = ndev_pdev(ndev);
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pdev = ndev->ntb.pdev;
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/* Mask all doorbell interrupts */
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ndev->db_mask = ndev->db_valid_mask;
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@ -811,7 +812,8 @@ static void ndev_init_debugfs(struct amd_ntb_dev *ndev)
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ndev->debugfs_info = NULL;
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} else {
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ndev->debugfs_dir =
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debugfs_create_dir(ndev_name(ndev), debugfs_dir);
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debugfs_create_dir(pci_name(ndev->ntb.pdev),
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debugfs_dir);
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if (!ndev->debugfs_dir)
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ndev->debugfs_info = NULL;
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else
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@ -846,7 +848,7 @@ static int amd_poll_link(struct amd_ntb_dev *ndev)
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reg = readl(mmio + AMD_SIDEINFO_OFFSET);
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reg &= NTB_LIN_STA_ACTIVE_BIT;
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dev_dbg(ndev_dev(ndev), "%s: reg_val = 0x%x.\n", __func__, reg);
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dev_dbg(&ndev->ntb.pdev->dev, "%s: reg_val = 0x%x.\n", __func__, reg);
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if (reg == ndev->cntl_sta)
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return 0;
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@ -928,7 +930,8 @@ static int amd_init_ntb(struct amd_ntb_dev *ndev)
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break;
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default:
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dev_err(ndev_dev(ndev), "AMD NTB does not support B2B mode.\n");
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dev_err(&ndev->ntb.pdev->dev,
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"AMD NTB does not support B2B mode.\n");
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return -EINVAL;
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}
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@ -957,10 +960,10 @@ static int amd_init_dev(struct amd_ntb_dev *ndev)
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struct pci_dev *pdev;
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int rc = 0;
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pdev = ndev_pdev(ndev);
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pdev = ndev->ntb.pdev;
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ndev->ntb.topo = amd_get_topo(ndev);
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dev_dbg(ndev_dev(ndev), "AMD NTB topo is %s\n",
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dev_dbg(&pdev->dev, "AMD NTB topo is %s\n",
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ntb_topo_string(ndev->ntb.topo));
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rc = amd_init_ntb(ndev);
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@ -969,7 +972,7 @@ static int amd_init_dev(struct amd_ntb_dev *ndev)
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rc = amd_init_isr(ndev);
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if (rc) {
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dev_err(ndev_dev(ndev), "fail to init isr.\n");
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dev_err(&pdev->dev, "fail to init isr.\n");
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return rc;
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}
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@ -1007,7 +1010,7 @@ static int amd_ntb_init_pci(struct amd_ntb_dev *ndev,
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rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
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if (rc)
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goto err_dma_mask;
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dev_warn(ndev_dev(ndev), "Cannot DMA highmem\n");
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dev_warn(&pdev->dev, "Cannot DMA highmem\n");
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}
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
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@ -1015,7 +1018,7 @@ static int amd_ntb_init_pci(struct amd_ntb_dev *ndev,
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rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
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if (rc)
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goto err_dma_mask;
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dev_warn(ndev_dev(ndev), "Cannot DMA consistent highmem\n");
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dev_warn(&pdev->dev, "Cannot DMA consistent highmem\n");
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}
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ndev->self_mmio = pci_iomap(pdev, 0, 0);
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@ -1038,7 +1041,7 @@ err_pci_enable:
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static void amd_ntb_deinit_pci(struct amd_ntb_dev *ndev)
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{
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struct pci_dev *pdev = ndev_pdev(ndev);
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struct pci_dev *pdev = ndev->ntb.pdev;
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pci_iounmap(pdev, ndev->self_mmio);
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@ -211,9 +211,6 @@ struct amd_ntb_dev {
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struct dentry *debugfs_info;
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};
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#define ndev_pdev(ndev) ((ndev)->ntb.pdev)
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#define ndev_name(ndev) pci_name(ndev_pdev(ndev))
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#define ndev_dev(ndev) (&ndev_pdev(ndev)->dev)
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#define ntb_ndev(__ntb) container_of(__ntb, struct amd_ntb_dev, ntb)
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#define hb_ndev(__work) container_of(__work, struct amd_ntb_dev, hb_timer.work)
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