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ARM: add coherent iommu dma ops
Remove arch_is_coherent() from iommu dma ops and implement separate coherent ops functions. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
This commit is contained in:
Rob Herring
Marek Szyprowski
parent
dd37e9405a
commit
0fa478df44
@ -1350,7 +1350,8 @@ static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
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*/
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static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
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size_t size, dma_addr_t *handle,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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enum dma_data_direction dir, struct dma_attrs *attrs,
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bool is_coherent)
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{
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struct dma_iommu_mapping *mapping = dev->archdata.mapping;
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dma_addr_t iova, iova_base;
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@ -1369,8 +1370,8 @@ static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
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phys_addr_t phys = page_to_phys(sg_page(s));
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unsigned int len = PAGE_ALIGN(s->offset + s->length);
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if (!arch_is_coherent() &&
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!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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if (!is_coherent &&
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!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
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ret = iommu_map(mapping->domain, iova, phys, len, 0);
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@ -1388,20 +1389,9 @@ fail:
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return ret;
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}
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/**
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* arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
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* @dev: valid struct device pointer
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Map a set of buffers described by scatterlist in streaming mode for DMA.
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* The scatter gather list elements are merged together (if possible) and
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* tagged with the appropriate dma address and length. They are obtained via
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* sg_dma_{address,length}.
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*/
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int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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static int __iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, struct dma_attrs *attrs,
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bool is_coherent)
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{
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struct scatterlist *s = sg, *dma = sg, *start = sg;
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int i, count = 0;
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@ -1417,7 +1407,7 @@ int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
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if (__map_sg_chunk(dev, start, size, &dma->dma_address,
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dir, attrs) < 0)
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dir, attrs, is_coherent) < 0)
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goto bad_mapping;
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dma->dma_address += offset;
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@ -1430,7 +1420,8 @@ int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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}
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size += s->length;
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}
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if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs) < 0)
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if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs,
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is_coherent) < 0)
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goto bad_mapping;
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dma->dma_address += offset;
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@ -1444,6 +1435,76 @@ bad_mapping:
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return 0;
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}
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/**
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* arm_coherent_iommu_map_sg - map a set of SG buffers for streaming mode DMA
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* @dev: valid struct device pointer
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Map a set of i/o coherent buffers described by scatterlist in streaming
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* mode for DMA. The scatter gather list elements are merged together (if
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* possible) and tagged with the appropriate dma address and length. They are
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* obtained via sg_dma_{address,length}.
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*/
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int arm_coherent_iommu_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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return __iommu_map_sg(dev, sg, nents, dir, attrs, true);
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}
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/**
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* arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
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* @dev: valid struct device pointer
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Map a set of buffers described by scatterlist in streaming mode for DMA.
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* The scatter gather list elements are merged together (if possible) and
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* tagged with the appropriate dma address and length. They are obtained via
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* sg_dma_{address,length}.
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*/
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int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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return __iommu_map_sg(dev, sg, nents, dir, attrs, false);
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}
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static void __iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir, struct dma_attrs *attrs,
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bool is_coherent)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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if (sg_dma_len(s))
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__iommu_remove_mapping(dev, sg_dma_address(s),
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sg_dma_len(s));
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if (!is_coherent &&
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!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__dma_page_dev_to_cpu(sg_page(s), s->offset,
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s->length, dir);
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}
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}
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/**
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* arm_coherent_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
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* @dev: valid struct device pointer
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* @sg: list of buffers
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* @nents: number of buffers to unmap (same as was passed to dma_map_sg)
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* @dir: DMA transfer direction (same as was passed to dma_map_sg)
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*
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* Unmap a set of streaming mode DMA translations. Again, CPU access
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* rules concerning calls here are the same as for dma_unmap_single().
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*/
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void arm_coherent_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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__iommu_unmap_sg(dev, sg, nents, dir, attrs, true);
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}
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/**
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* arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
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* @dev: valid struct device pointer
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@ -1457,18 +1518,7 @@ bad_mapping:
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void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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if (sg_dma_len(s))
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__iommu_remove_mapping(dev, sg_dma_address(s),
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sg_dma_len(s));
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if (!arch_is_coherent() &&
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!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__dma_page_dev_to_cpu(sg_page(s), s->offset,
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s->length, dir);
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}
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__iommu_unmap_sg(dev, sg, nents, dir, attrs, false);
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}
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/**
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@ -1485,8 +1535,7 @@ void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int i;
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for_each_sg(sg, s, nents, i)
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if (!arch_is_coherent())
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__dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
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__dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
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}
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@ -1504,11 +1553,42 @@ void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int i;
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for_each_sg(sg, s, nents, i)
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if (!arch_is_coherent())
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__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
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__dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
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}
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/**
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* arm_coherent_iommu_map_page
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* @dev: valid struct device pointer
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* @page: page that buffer resides in
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* @offset: offset into page for start of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Coherent IOMMU aware version of arm_dma_map_page()
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*/
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static dma_addr_t arm_coherent_iommu_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct dma_iommu_mapping *mapping = dev->archdata.mapping;
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dma_addr_t dma_addr;
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int ret, len = PAGE_ALIGN(size + offset);
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dma_addr = __alloc_iova(mapping, len);
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if (dma_addr == DMA_ERROR_CODE)
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return dma_addr;
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ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
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if (ret < 0)
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goto fail;
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return dma_addr + offset;
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fail:
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__free_iova(mapping, dma_addr, len);
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return DMA_ERROR_CODE;
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}
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/**
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* arm_iommu_map_page
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* @dev: valid struct device pointer
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@ -1523,25 +1603,36 @@ static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct dma_iommu_mapping *mapping = dev->archdata.mapping;
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dma_addr_t dma_addr;
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int ret, len = PAGE_ALIGN(size + offset);
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if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__dma_page_cpu_to_dev(page, offset, size, dir);
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dma_addr = __alloc_iova(mapping, len);
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if (dma_addr == DMA_ERROR_CODE)
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return dma_addr;
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return arm_coherent_iommu_map_page(dev, page, offset, size, dir, attrs);
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}
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ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
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if (ret < 0)
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goto fail;
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/**
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* arm_coherent_iommu_unmap_page
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* @dev: valid struct device pointer
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* @handle: DMA address of buffer
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* @size: size of buffer (same as passed to dma_map_page)
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* @dir: DMA transfer direction (same as passed to dma_map_page)
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*
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* Coherent IOMMU aware version of arm_dma_unmap_page()
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*/
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static void arm_coherent_iommu_unmap_page(struct device *dev, dma_addr_t handle,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct dma_iommu_mapping *mapping = dev->archdata.mapping;
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dma_addr_t iova = handle & PAGE_MASK;
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struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
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int offset = handle & ~PAGE_MASK;
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int len = PAGE_ALIGN(size + offset);
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return dma_addr + offset;
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fail:
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__free_iova(mapping, dma_addr, len);
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return DMA_ERROR_CODE;
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if (!iova)
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return;
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iommu_unmap(mapping->domain, iova, len);
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__free_iova(mapping, iova, len);
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}
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/**
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@ -1566,7 +1657,7 @@ static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
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if (!iova)
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return;
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if (!arch_is_coherent() && !dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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if (!dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
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__dma_page_dev_to_cpu(page, offset, size, dir);
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iommu_unmap(mapping->domain, iova, len);
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@ -1584,8 +1675,7 @@ static void arm_iommu_sync_single_for_cpu(struct device *dev,
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if (!iova)
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return;
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if (!arch_is_coherent())
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__dma_page_dev_to_cpu(page, offset, size, dir);
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__dma_page_dev_to_cpu(page, offset, size, dir);
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}
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static void arm_iommu_sync_single_for_device(struct device *dev,
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@ -1619,6 +1709,19 @@ struct dma_map_ops iommu_ops = {
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.sync_sg_for_device = arm_iommu_sync_sg_for_device,
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};
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struct dma_map_ops iommu_coherent_ops = {
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.alloc = arm_iommu_alloc_attrs,
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.free = arm_iommu_free_attrs,
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.mmap = arm_iommu_mmap_attrs,
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.get_sgtable = arm_iommu_get_sgtable,
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.map_page = arm_coherent_iommu_map_page,
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.unmap_page = arm_coherent_iommu_unmap_page,
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.map_sg = arm_coherent_iommu_map_sg,
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.unmap_sg = arm_coherent_iommu_unmap_sg,
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};
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/**
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* arm_iommu_create_mapping
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* @bus: pointer to the bus holding the client device (for IOMMU calls)
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