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x86: share rtc code
Remove the rtc code from time_64.c and add the extra bits to the i386 path. The ACPI century check is probably valid for i386 as well, but this is material for a separate patch. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -11,7 +11,7 @@ obj-y := process_64.o signal_64.o entry_64.o traps_64.o irq_64.o \
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x8664_ksyms_64.o i387_64.o syscall_64.o vsyscall_64.o \
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setup64.o bootflag.o e820_64.o reboot_64.o quirks.o i8237.o \
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pci-dma_64.o pci-nommu_64.o alternative.o hpet.o tsc_64.o bugs_64.o \
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i8253.o io_delay.o
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i8253.o io_delay.o rtc.o
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obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-y += cpu/
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@ -1,11 +1,32 @@
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/*
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* RTC related functions
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*/
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#include <linux/acpi.h>
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#include <linux/bcd.h>
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#include <linux/mc146818rtc.h>
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#include <asm/time.h>
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#ifdef CONFIG_X86_32
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# define CMOS_YEARS_OFFS 1900
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/*
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* This is a special lock that is owned by the CPU and holds the index
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* register we are working with. It is required for NMI access to the
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* CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
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*/
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volatile unsigned long cmos_lock = 0;
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EXPORT_SYMBOL(cmos_lock);
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#else
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/*
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* x86-64 systems only exists since 2002.
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* This will work up to Dec 31, 2100
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*/
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# define CMOS_YEARS_OFFS 2000
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#endif
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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/*
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* In order to set the CMOS clock precisely, set_rtc_mmss has to be
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* called 500 ms after the second nowtime has started, because when
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@ -22,10 +43,12 @@ int mach_set_rtc_mmss(unsigned long nowtime)
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int real_seconds, real_minutes, cmos_minutes;
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unsigned char save_control, save_freq_select;
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save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
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/* tell the clock it's being set */
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save_control = CMOS_READ(RTC_CONTROL);
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CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
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save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
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/* stop and reset prescaler */
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save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
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CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
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cmos_minutes = CMOS_READ(RTC_MINUTES);
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@ -40,8 +63,9 @@ int mach_set_rtc_mmss(unsigned long nowtime)
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*/
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real_seconds = nowtime % 60;
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real_minutes = nowtime / 60;
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/* correct for half hour time zone */
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if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
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real_minutes += 30; /* correct for half hour time zone */
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real_minutes += 30;
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real_minutes %= 60;
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if (abs(real_minutes - cmos_minutes) < 30) {
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@ -73,18 +97,32 @@ int mach_set_rtc_mmss(unsigned long nowtime)
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unsigned long mach_get_cmos_time(void)
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{
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unsigned int year, mon, day, hour, min, sec;
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unsigned int year, mon, day, hour, min, sec, century = 0;
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do {
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sec = CMOS_READ(RTC_SECONDS);
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min = CMOS_READ(RTC_MINUTES);
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hour = CMOS_READ(RTC_HOURS);
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day = CMOS_READ(RTC_DAY_OF_MONTH);
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mon = CMOS_READ(RTC_MONTH);
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year = CMOS_READ(RTC_YEAR);
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} while (sec != CMOS_READ(RTC_SECONDS));
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/*
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* If UIP is clear, then we have >= 244 microseconds before
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* RTC registers will be updated. Spec sheet says that this
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* is the reliable way to read RTC - registers. If UIP is set
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* then the register access might be invalid.
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*/
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while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
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cpu_relax();
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if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
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sec = CMOS_READ(RTC_SECONDS);
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min = CMOS_READ(RTC_MINUTES);
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hour = CMOS_READ(RTC_HOURS);
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day = CMOS_READ(RTC_DAY_OF_MONTH);
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mon = CMOS_READ(RTC_MONTH);
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year = CMOS_READ(RTC_YEAR);
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#if defined(CONFIG_ACPI) && defined(CONFIG_X86_64)
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/* CHECKME: Is this really 64bit only ??? */
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if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
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acpi_gbl_FADT.century)
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century = CMOS_READ(acpi_gbl_FADT.century);
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#endif
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if (RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)) {
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BCD_TO_BIN(sec);
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BCD_TO_BIN(min);
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BCD_TO_BIN(hour);
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@ -93,24 +131,19 @@ unsigned long mach_get_cmos_time(void)
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BCD_TO_BIN(year);
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}
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year += 1900;
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if (year < 1970)
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year += 100;
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if (century) {
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BCD_TO_BIN(century);
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year += century * 100;
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printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
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} else {
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year += CMOS_YEARS_OFFS;
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if (year < 1970)
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year += 100;
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}
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return mktime(year, mon, day, hour, min, sec);
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}
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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/*
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* This is a special lock that is owned by the CPU and holds the index
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* register we are working with. It is required for NMI access to the
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* CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
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*/
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volatile unsigned long cmos_lock = 0;
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EXPORT_SYMBOL(cmos_lock);
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/* Routines for accessing the CMOS RAM/RTC. */
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unsigned char rtc_cmos_read(unsigned char addr)
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{
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@ -138,8 +171,6 @@ static int set_rtc_mmss(unsigned long nowtime)
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int retval;
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unsigned long flags;
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/* gets recalled with irq locally disabled */
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/* XXX - does irqsave resolve this? -johnstul */
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spin_lock_irqsave(&rtc_lock, flags);
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retval = set_wallclock(nowtime);
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spin_unlock_irqrestore(&rtc_lock, flags);
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@ -150,8 +181,7 @@ static int set_rtc_mmss(unsigned long nowtime)
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/* not static: needed by APM */
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unsigned long read_persistent_clock(void)
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{
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unsigned long retval;
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unsigned long flags;
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unsigned long retval, flags;
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spin_lock_irqsave(&rtc_lock, flags);
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retval = get_wallclock();
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@ -46,9 +46,6 @@
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#include <asm/nmi.h>
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#include <asm/vgtod.h>
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
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unsigned long profile_pc(struct pt_regs *regs)
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@ -69,103 +66,6 @@ unsigned long profile_pc(struct pt_regs *regs)
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}
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EXPORT_SYMBOL(profile_pc);
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/* Routines for accessing the CMOS RAM/RTC. */
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unsigned char rtc_cmos_read(unsigned char addr)
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{
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unsigned char val;
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lock_cmos_prefix(addr);
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outb_p(addr, RTC_PORT(0));
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val = inb_p(RTC_PORT(1));
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lock_cmos_suffix(addr);
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return val;
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}
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EXPORT_SYMBOL(rtc_cmos_read);
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void rtc_cmos_write(unsigned char val, unsigned char addr)
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{
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lock_cmos_prefix(addr);
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outb_p(addr, RTC_PORT(0));
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outb_p(val, RTC_PORT(1));
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lock_cmos_suffix(addr);
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}
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EXPORT_SYMBOL(rtc_cmos_write);
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/*
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* In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
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* ms after the second nowtime has started, because when nowtime is written
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* into the registers of the CMOS clock, it will jump to the next second
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* precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
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* sheet for details.
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*/
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static int set_rtc_mmss(unsigned long nowtime)
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{
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int retval = 0;
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int real_seconds, real_minutes, cmos_minutes;
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unsigned char control, freq_select;
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unsigned long flags;
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/*
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* set_rtc_mmss is called when irqs are enabled, so disable irqs here
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*/
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spin_lock_irqsave(&rtc_lock, flags);
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/*
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* Tell the clock it's being set and stop it.
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*/
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control = CMOS_READ(RTC_CONTROL);
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CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
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freq_select = CMOS_READ(RTC_FREQ_SELECT);
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CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
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cmos_minutes = CMOS_READ(RTC_MINUTES);
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BCD_TO_BIN(cmos_minutes);
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/*
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* since we're only adjusting minutes and seconds, don't interfere with hour
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* overflow. This avoids messing with unknown time zones but requires your RTC
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* not to be off by more than 15 minutes. Since we're calling it only when
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* our clock is externally synchronized using NTP, this shouldn't be a problem.
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*/
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real_seconds = nowtime % 60;
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real_minutes = nowtime / 60;
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if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
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real_minutes += 30; /* correct for half hour time zone */
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real_minutes %= 60;
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if (abs(real_minutes - cmos_minutes) >= 30) {
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printk(KERN_WARNING "time.c: can't update CMOS clock "
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"from %d to %d\n", cmos_minutes, real_minutes);
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retval = -1;
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} else {
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BIN_TO_BCD(real_seconds);
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BIN_TO_BCD(real_minutes);
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CMOS_WRITE(real_seconds, RTC_SECONDS);
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CMOS_WRITE(real_minutes, RTC_MINUTES);
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}
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/*
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* The following flags have to be released exactly in this order, otherwise the
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* DS12887 (popular MC146818A clone with integrated battery and quartz) will
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* not reset the oscillator and will not update precisely 500 ms later. You
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* won't find this mentioned in the Dallas Semiconductor data sheets, but who
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* believes data sheets anyway ... -- Markus Kuhn
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*/
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CMOS_WRITE(control, RTC_CONTROL);
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CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
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spin_unlock_irqrestore(&rtc_lock, flags);
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return retval;
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}
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int update_persistent_clock(struct timespec now)
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{
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return set_rtc_mmss(now.tv_sec);
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}
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static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
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{
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add_pda(irq0_irqs, 1);
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@ -175,63 +75,6 @@ static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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unsigned long read_persistent_clock(void)
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{
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unsigned int year, mon, day, hour, min, sec;
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unsigned long flags;
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unsigned century = 0;
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spin_lock_irqsave(&rtc_lock, flags);
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/*
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* if UIP is clear, then we have >= 244 microseconds before RTC
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* registers will be updated. Spec sheet says that this is the
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* reliable way to read RTC - registers invalid (off bus) during update
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*/
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while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
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cpu_relax();
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/* now read all RTC registers while stable with interrupts disabled */
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sec = CMOS_READ(RTC_SECONDS);
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min = CMOS_READ(RTC_MINUTES);
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hour = CMOS_READ(RTC_HOURS);
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day = CMOS_READ(RTC_DAY_OF_MONTH);
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mon = CMOS_READ(RTC_MONTH);
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year = CMOS_READ(RTC_YEAR);
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#ifdef CONFIG_ACPI
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if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
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acpi_gbl_FADT.century)
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century = CMOS_READ(acpi_gbl_FADT.century);
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#endif
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spin_unlock_irqrestore(&rtc_lock, flags);
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/*
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* We know that x86-64 always uses BCD format, no need to check the
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* config register.
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*/
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BCD_TO_BIN(sec);
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BCD_TO_BIN(min);
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BCD_TO_BIN(hour);
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BCD_TO_BIN(day);
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BCD_TO_BIN(mon);
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BCD_TO_BIN(year);
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if (century) {
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BCD_TO_BIN(century);
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year += century * 100;
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printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
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} else {
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/*
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* x86-64 systems only exists since 2002.
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* This will work up to Dec 31, 2100
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*/
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year += 2000;
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}
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return mktime(year, mon, day, hour, min, sec);
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}
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/* calibrate_cpu is used on systems with fixed rate TSCs to determine
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* processor frequency */
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#define TICK_COUNT 100000000
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