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ARM: Tegra: Force PORT_TEGRA as the UART type
8250.c recently gained an explicit PORT_TEGRA port type. Specifically request this in all Tegra boards' UART platform data. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -49,7 +49,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.mapbase = TEGRA_UARTD_BASE,
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.mapbase = TEGRA_UARTD_BASE,
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.irq = INT_UARTD,
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.irq = INT_UARTD,
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.flags = UPF_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
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.type = PORT_TEGRA,
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.iotype = UPIO_MEM,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.regshift = 2,
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.uartclk = 216000000,
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.uartclk = 216000000,
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@ -50,7 +50,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
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.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
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.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
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.mapbase = TEGRA_UARTA_BASE,
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.mapbase = TEGRA_UARTA_BASE,
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.irq = INT_UARTA,
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.irq = INT_UARTA,
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.flags = UPF_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
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.type = PORT_TEGRA,
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.iotype = UPIO_MEM,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.regshift = 2,
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.uartclk = 216000000,
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.uartclk = 216000000,
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@ -59,7 +60,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.mapbase = TEGRA_UARTD_BASE,
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.mapbase = TEGRA_UARTD_BASE,
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.irq = INT_UARTD,
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.irq = INT_UARTD,
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.flags = UPF_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
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.type = PORT_TEGRA,
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.iotype = UPIO_MEM,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.regshift = 2,
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.uartclk = 216000000,
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.uartclk = 216000000,
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@ -44,7 +44,8 @@
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static struct plat_serial8250_port debug_uart_platform_data[] = {
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static struct plat_serial8250_port debug_uart_platform_data[] = {
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{
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{
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/* Memory and IRQ filled in before registration */
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/* Memory and IRQ filled in before registration */
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.flags = UPF_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
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.type = PORT_TEGRA,
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.iotype = UPIO_MEM,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.regshift = 2,
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.uartclk = 216000000,
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.uartclk = 216000000,
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@ -46,7 +46,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
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.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
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.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
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.mapbase = TEGRA_UARTA_BASE,
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.mapbase = TEGRA_UARTA_BASE,
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.irq = INT_UARTA,
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.irq = INT_UARTA,
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.flags = UPF_BOOT_AUTOCONF,
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.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
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.type = PORT_TEGRA,
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.iotype = UPIO_MEM,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.regshift = 2,
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.uartclk = 216000000,
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.uartclk = 216000000,
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