mirror of
https://github.com/FEX-Emu/linux.git
synced 2025-01-06 17:43:43 +00:00
UniPhier ARM64 SoC DT updates for v4.15
- add thermal monitor and thermal zone nodes - add efuse nodes - fix W=2 warnings - add GPIO controller nodes and related properties - add resets properties -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ7idoAAoJED2LAQed4NsG9HsQAKbgS6BqmEi7l6dg8Iz++DPE OkICvN5EPMh0NFujlqfGswmawXgZv1MsvQphFyJ9+a2FC1wC7p8AUqiNmEiXt208 +ogVs1LVHDJwMyJcP1iL1eGJClMOdX9hQ11qQfSlpKFqN6xy67okigahSEMGRveU Bydncrih9/zxepv9pCENjE6wuOO73DpxyKsGooVgCeTKtQfSMpT9OhRqMXsC8e3i OswsCPii3JtlYEN6EsBj/zkE349mUwkThA+JEZ0nxzgrMir7+6pDJwfu/Dx4F+Z4 wupplnHAd4/WzAbySb1VBKiLcFhqf0tcdLLmlqS2zNg4s712BDlS22tsurDvpvLt lNPZP+/bxcctgug+4pPy5ogilUzExotd+stHUq9G7zCZKAnK50NNdQDb4uAwbc/l 7yAgOXXIldP523cX3xTMC6x5k4yJD6icCwtOEKyiUqI3hJUo1BlFS1tzlTic+iOx CDyNwBGH5vECCHiJyIQHH5HOQ5dvBuArGgnSWdWqFFdYzsIEKnC9UT+VnHJh9giA XeyLj/PMnamsso5j1oKhIuxGLho4ap5w4J99QS7ImBD9LJrIaSFrEY7MzNGref9j AdxMKPdkZmJg7Jq2hiwcF/5PF+84rUccu9ESrZ/sure2o8XGu72Bpn6pK25HQERI 7EROd1eaKQhdUCn0zKXj =YY9L -----END PGP SIGNATURE----- Merge tag 'uniphier-dt64-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt Pull "UniPhier ARM64 SoC DT updates for v4.15" from Masahiro Yamada: - add thermal monitor and thermal zone nodes - add efuse nodes - fix W=2 warnings - add GPIO controller nodes and related properties - add resets properties * tag 'uniphier-dt64-v4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: add resets properties arm64: dts: uniphier: add eMMC hardware reset provider node arm64: dts: uniphier: add GPIO hog definition arm64: dts: uniphier: route on-board device IRQ to GPIO controller arm64: dts: uniphier: add GPIO controller nodes arm64: dts: uniphier: fix W=2 build warnings arm64: dts: uniphier: enable NAND for PXs3 reference board arm64: dts: uniphier: add efuse node for LD11, LD20, and PXs3 arm64: dts: uniphier: add nodes of thermal monitor and thermal zone for LD20
This commit is contained in:
Arnd Bergmann
commit
11c3889c23
@ -40,13 +40,22 @@
|
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};
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ðsc {
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interrupts = <0 48 4>;
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interrupt-parent = <&gpio>;
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interrupts = <0 8>;
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};
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&serial0 {
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status = "okay";
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};
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&gpio {
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xirq0 {
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gpio-hog;
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gpios = <120 0>;
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input;
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};
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};
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&i2c0 {
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status = "okay";
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};
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@ -7,6 +7,8 @@
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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#include <dt-bindings/gpio/gpio.h>
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/memreserve/ 0x80000000 0x02000000;
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/ {
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@ -49,7 +51,7 @@
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};
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};
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cluster0_opp: opp_table {
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cluster0_opp: opp-table {
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compatible = "operating-points-v2";
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opp-shared;
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@ -96,6 +98,11 @@
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};
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 13 4>,
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@ -118,6 +125,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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clocks = <&peri_clk 0>;
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resets = <&peri_rst 0>;
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};
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serial1: serial@54006900 {
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@ -128,6 +136,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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clocks = <&peri_clk 1>;
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resets = <&peri_rst 1>;
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};
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serial2: serial@54006a00 {
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@ -138,6 +147,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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clocks = <&peri_clk 2>;
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resets = <&peri_rst 2>;
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};
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serial3: serial@54006b00 {
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@ -148,6 +158,32 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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clocks = <&peri_clk 3>;
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resets = <&peri_rst 3>;
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};
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gpio: gpio@55000000 {
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compatible = "socionext,uniphier-gpio";
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reg = <0x55000000 0x200>;
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interrupt-parent = <&aidet>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl 0 0 0>,
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<&pinctrl 43 0 0>,
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<&pinctrl 51 0 0>,
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<&pinctrl 96 0 0>,
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<&pinctrl 160 0 0>,
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<&pinctrl 184 0 0>;
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gpio-ranges-group-names = "gpio_range0",
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"gpio_range1",
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"gpio_range2",
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"gpio_range3",
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"gpio_range4",
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"gpio_range5";
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ngpios = <200>;
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socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
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<21 217 3>;
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};
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adamv@57920000 {
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@ -171,6 +207,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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clocks = <&peri_clk 4>;
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resets = <&peri_rst 4>;
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clock-frequency = <100000>;
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};
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@ -184,6 +221,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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clocks = <&peri_clk 5>;
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resets = <&peri_rst 5>;
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clock-frequency = <100000>;
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};
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@ -194,6 +232,7 @@
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#size-cells = <0>;
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interrupts = <0 43 4>;
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clocks = <&peri_clk 6>;
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resets = <&peri_rst 6>;
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clock-frequency = <400000>;
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};
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@ -207,6 +246,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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clocks = <&peri_clk 7>;
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resets = <&peri_rst 7>;
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clock-frequency = <100000>;
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};
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@ -220,6 +260,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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clocks = <&peri_clk 8>;
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resets = <&peri_rst 8>;
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clock-frequency = <100000>;
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};
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@ -230,6 +271,7 @@
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#size-cells = <0>;
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interrupts = <0 25 4>;
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clocks = <&peri_clk 9>;
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resets = <&peri_rst 9>;
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clock-frequency = <400000>;
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};
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@ -282,9 +324,11 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_emmc>;
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clocks = <&sys_clk 4>;
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resets = <&sys_rst 4>;
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bus-width = <8>;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-pwrseq = <&emmc_pwrseq>;
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cdns,phy-input-delay-legacy = <4>;
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cdns,phy-input-delay-mmc-highspeed = <2>;
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cdns,phy-input-delay-mmc-ddr = <3>;
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@ -355,6 +399,24 @@
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};
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};
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soc-glue@5f900000 {
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compatible = "socionext,uniphier-ld11-soc-glue-debug",
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"simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x5f900000 0x2000>;
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efuse@100 {
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compatible = "socionext,uniphier-efuse";
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reg = <0x100 0x28>;
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};
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efuse@200 {
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compatible = "socionext,uniphier-efuse";
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reg = <0x200 0x68>;
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};
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};
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aidet: aidet@5fc20000 {
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compatible = "socionext,uniphier-ld11-aidet";
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reg = <0x5fc20000 0x200>;
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@ -400,6 +462,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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clocks = <&sys_clk 2>;
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resets = <&sys_rst 2>;
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};
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};
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};
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@ -40,13 +40,22 @@
|
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};
|
||||
|
||||
ðsc {
|
||||
interrupts = <0 48 4>;
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interrupt-parent = <&gpio>;
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interrupts = <0 8>;
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};
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&serial0 {
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status = "okay";
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};
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&gpio {
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xirq0 {
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gpio-hog;
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gpios = <120 0>;
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input;
|
||||
};
|
||||
};
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&i2c0 {
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status = "okay";
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};
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@ -7,6 +7,9 @@
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/thermal/thermal.h>
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/memreserve/ 0x80000000 0x02000000;
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/ {
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@ -46,6 +49,7 @@
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clocks = <&sys_clk 32>;
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enable-method = "psci";
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operating-points-v2 = <&cluster0_opp>;
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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@ -64,6 +68,7 @@
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clocks = <&sys_clk 33>;
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enable-method = "psci";
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operating-points-v2 = <&cluster1_opp>;
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#cooling-cells = <2>;
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};
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cpu3: cpu@101 {
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@ -76,7 +81,7 @@
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};
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};
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cluster0_opp: opp_table0 {
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cluster0_opp: opp-table0 {
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compatible = "operating-points-v2";
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opp-shared;
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@ -114,7 +119,7 @@
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};
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};
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cluster1_opp: opp_table1 {
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cluster1_opp: opp-table1 {
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compatible = "operating-points-v2";
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opp-shared;
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@ -165,6 +170,11 @@
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};
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};
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|
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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reset-gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <1 13 4>,
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@ -173,6 +183,40 @@
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<1 10 4>;
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};
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thermal-zones {
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cpu-thermal {
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polling-delay-passive = <250>; /* 250ms */
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polling-delay = <1000>; /* 1000ms */
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thermal-sensors = <&pvtctl>;
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trips {
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cpu_crit: cpu-crit {
|
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temperature = <110000>; /* 110C */
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hysteresis = <2000>;
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type = "critical";
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};
|
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cpu_alert: cpu-alert {
|
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temperature = <100000>; /* 100C */
|
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hysteresis = <2000>;
|
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type = "passive";
|
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};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu_alert>;
|
||||
cooling-device = <&cpu0
|
||||
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu_alert>;
|
||||
cooling-device = <&cpu2
|
||||
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soc@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@ -187,6 +231,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
clocks = <&peri_clk 0>;
|
||||
resets = <&peri_rst 0>;
|
||||
};
|
||||
|
||||
serial1: serial@54006900 {
|
||||
@ -197,6 +242,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
clocks = <&peri_clk 1>;
|
||||
resets = <&peri_rst 1>;
|
||||
};
|
||||
|
||||
serial2: serial@54006a00 {
|
||||
@ -207,6 +253,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
clocks = <&peri_clk 2>;
|
||||
resets = <&peri_rst 2>;
|
||||
};
|
||||
|
||||
serial3: serial@54006b00 {
|
||||
@ -217,6 +264,26 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
clocks = <&peri_clk 3>;
|
||||
resets = <&peri_rst 3>;
|
||||
};
|
||||
|
||||
gpio: gpio@55000000 {
|
||||
compatible = "socionext,uniphier-gpio";
|
||||
reg = <0x55000000 0x200>;
|
||||
interrupt-parent = <&aidet>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl 0 0 0>,
|
||||
<&pinctrl 96 0 0>,
|
||||
<&pinctrl 160 0 0>;
|
||||
gpio-ranges-group-names = "gpio_range0",
|
||||
"gpio_range1",
|
||||
"gpio_range2";
|
||||
ngpios = <205>;
|
||||
socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
|
||||
<21 217 3>;
|
||||
};
|
||||
|
||||
adamv@57920000 {
|
||||
@ -240,6 +307,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
clocks = <&peri_clk 4>;
|
||||
resets = <&peri_rst 4>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -253,6 +321,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
clocks = <&peri_clk 5>;
|
||||
resets = <&peri_rst 5>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -263,6 +332,7 @@
|
||||
#size-cells = <0>;
|
||||
interrupts = <0 43 4>;
|
||||
clocks = <&peri_clk 6>;
|
||||
resets = <&peri_rst 6>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
@ -276,6 +346,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
clocks = <&peri_clk 7>;
|
||||
resets = <&peri_rst 7>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -289,6 +360,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c4>;
|
||||
clocks = <&peri_clk 8>;
|
||||
resets = <&peri_rst 8>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -299,6 +371,7 @@
|
||||
#size-cells = <0>;
|
||||
interrupts = <0 25 4>;
|
||||
clocks = <&peri_clk 9>;
|
||||
resets = <&peri_rst 9>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
@ -356,9 +429,11 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_emmc>;
|
||||
clocks = <&sys_clk 4>;
|
||||
resets = <&sys_rst 4>;
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
cdns,phy-input-delay-legacy = <4>;
|
||||
cdns,phy-input-delay-mmc-highspeed = <2>;
|
||||
cdns,phy-input-delay-mmc-ddr = <3>;
|
||||
@ -376,6 +451,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
soc-glue@5f900000 {
|
||||
compatible = "socionext,uniphier-ld20-soc-glue-debug",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x5f900000 0x2000>;
|
||||
|
||||
efuse@100 {
|
||||
compatible = "socionext,uniphier-efuse";
|
||||
reg = <0x100 0x28>;
|
||||
};
|
||||
|
||||
efuse@200 {
|
||||
compatible = "socionext,uniphier-efuse";
|
||||
reg = <0x200 0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
aidet: aidet@5fc20000 {
|
||||
compatible = "socionext,uniphier-ld20-aidet";
|
||||
reg = <0x5fc20000 0x200>;
|
||||
@ -410,6 +503,13 @@
|
||||
watchdog {
|
||||
compatible = "socionext,uniphier-wdt";
|
||||
};
|
||||
|
||||
pvtctl: pvtctl {
|
||||
compatible = "socionext,uniphier-ld20-thermal";
|
||||
interrupts = <0 3 4>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
socionext,tmod-calibration = <0x0f22 0x68ee>;
|
||||
};
|
||||
};
|
||||
|
||||
nand: nand@68000000 {
|
||||
@ -421,6 +521,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
clocks = <&sys_clk 2>;
|
||||
resets = <&sys_rst 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -60,3 +60,7 @@
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -7,6 +7,8 @@
|
||||
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/memreserve/ 0x80000000 0x02000000;
|
||||
|
||||
/ {
|
||||
@ -73,7 +75,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
cluster0_opp: opp_table {
|
||||
cluster0_opp: opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
@ -124,6 +126,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
emmc_pwrseq: emmc-pwrseq {
|
||||
compatible = "mmc-pwrseq-emmc";
|
||||
reset-gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <1 13 4>,
|
||||
@ -146,6 +153,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart0>;
|
||||
clocks = <&peri_clk 0>;
|
||||
resets = <&peri_rst 0>;
|
||||
};
|
||||
|
||||
serial1: serial@54006900 {
|
||||
@ -156,6 +164,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
clocks = <&peri_clk 1>;
|
||||
resets = <&peri_rst 1>;
|
||||
};
|
||||
|
||||
serial2: serial@54006a00 {
|
||||
@ -166,6 +175,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
clocks = <&peri_clk 2>;
|
||||
resets = <&peri_rst 2>;
|
||||
};
|
||||
|
||||
serial3: serial@54006b00 {
|
||||
@ -176,6 +186,26 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
clocks = <&peri_clk 3>;
|
||||
resets = <&peri_rst 3>;
|
||||
};
|
||||
|
||||
gpio: gpio@55000000 {
|
||||
compatible = "socionext,uniphier-gpio";
|
||||
reg = <0x55000000 0x200>;
|
||||
interrupt-parent = <&aidet>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-ranges = <&pinctrl 0 0 0>,
|
||||
<&pinctrl 96 0 0>,
|
||||
<&pinctrl 160 0 0>;
|
||||
gpio-ranges-group-names = "gpio_range0",
|
||||
"gpio_range1",
|
||||
"gpio_range2";
|
||||
ngpios = <286>;
|
||||
socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
|
||||
<21 217 3>;
|
||||
};
|
||||
|
||||
i2c0: i2c@58780000 {
|
||||
@ -188,6 +218,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c0>;
|
||||
clocks = <&peri_clk 4>;
|
||||
resets = <&peri_rst 4>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -201,6 +232,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
clocks = <&peri_clk 5>;
|
||||
resets = <&peri_rst 5>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -214,6 +246,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
clocks = <&peri_clk 6>;
|
||||
resets = <&peri_rst 6>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -227,6 +260,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
clocks = <&peri_clk 7>;
|
||||
resets = <&peri_rst 7>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
@ -238,6 +272,7 @@
|
||||
#size-cells = <0>;
|
||||
interrupts = <0 26 4>;
|
||||
clocks = <&peri_clk 10>;
|
||||
resets = <&peri_rst 10>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
@ -295,9 +330,11 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_emmc>;
|
||||
clocks = <&sys_clk 4>;
|
||||
resets = <&sys_rst 4>;
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
cdns,phy-input-delay-legacy = <4>;
|
||||
cdns,phy-input-delay-mmc-highspeed = <2>;
|
||||
cdns,phy-input-delay-mmc-ddr = <3>;
|
||||
@ -315,6 +352,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
soc-glue@5f900000 {
|
||||
compatible = "socionext,uniphier-pxs3-soc-glue-debug",
|
||||
"simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x5f900000 0x2000>;
|
||||
|
||||
efuse@100 {
|
||||
compatible = "socionext,uniphier-efuse";
|
||||
reg = <0x100 0x28>;
|
||||
};
|
||||
|
||||
efuse@200 {
|
||||
compatible = "socionext,uniphier-efuse";
|
||||
reg = <0x200 0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
aidet: aidet@5fc20000 {
|
||||
compatible = "socionext,uniphier-pxs3-aidet";
|
||||
reg = <0x5fc20000 0x200>;
|
||||
@ -360,6 +415,7 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
clocks = <&sys_clk 2>;
|
||||
resets = <&sys_rst 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user