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[SCSI] pm80xx: MSI-X implementation for using 64 interrupts
Implementation of interrupt handlers and tasklets to support upto 64 interrupt for the device. Signed-off-by: Sakthivel K <Sakthivel.SaravananKamalRaju@pmcs.com> Signed-off-by: Anand Kumar S <AnandKumar.Santhanam@pmcs.com> Acked-by: Jack Wang <jack_wang@usish.com> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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@ -159,33 +159,71 @@ static void pm8001_free(struct pm8001_hba_info *pm8001_ha)
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}
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#ifdef PM8001_USE_TASKLET
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/**
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* tasklet for 64 msi-x interrupt handler
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* @opaque: the passed general host adapter struct
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* Note: pm8001_tasklet is common for pm8001 & pm80xx
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*/
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static void pm8001_tasklet(unsigned long opaque)
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{
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struct pm8001_hba_info *pm8001_ha;
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u32 vec;
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pm8001_ha = (struct pm8001_hba_info *)opaque;
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if (unlikely(!pm8001_ha))
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BUG_ON(1);
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PM8001_CHIP_DISP->isr(pm8001_ha, 0);
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vec = pm8001_ha->int_vector;
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PM8001_CHIP_DISP->isr(pm8001_ha, vec);
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}
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#endif
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static struct pm8001_hba_info *outq_to_hba(u8 *outq)
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{
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return container_of((outq - *outq), struct pm8001_hba_info, outq[0]);
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}
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/**
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* pm8001_interrupt - when HBA originate a interrupt,we should invoke this
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* dispatcher to handle each case.
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* @irq: irq number.
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* @opaque: the passed general host adapter struct
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* pm8001_interrupt_handler_msix - main MSIX interrupt handler.
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* It obtains the vector number and calls the equivalent bottom
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* half or services directly.
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* @opaque: the passed outbound queue/vector. Host structure is
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* retrieved from the same.
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*/
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static irqreturn_t pm8001_interrupt(int irq, void *opaque)
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static irqreturn_t pm8001_interrupt_handler_msix(int irq, void *opaque)
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{
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struct pm8001_hba_info *pm8001_ha = outq_to_hba(opaque);
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u8 outq = *(u8 *)opaque;
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irqreturn_t ret = IRQ_HANDLED;
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if (unlikely(!pm8001_ha))
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return IRQ_NONE;
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if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
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return IRQ_NONE;
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pm8001_ha->int_vector = outq;
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#ifdef PM8001_USE_TASKLET
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tasklet_schedule(&pm8001_ha->tasklet);
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#else
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ret = PM8001_CHIP_DISP->isr(pm8001_ha, outq);
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#endif
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return ret;
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}
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/**
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* pm8001_interrupt_handler_intx - main INTx interrupt handler.
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* @dev_id: sas_ha structure. The HBA is retrieved from sas_has structure.
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*/
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static irqreturn_t pm8001_interrupt_handler_intx(int irq, void *dev_id)
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{
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struct pm8001_hba_info *pm8001_ha;
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irqreturn_t ret = IRQ_HANDLED;
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struct sas_ha_struct *sha = opaque;
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struct sas_ha_struct *sha = dev_id;
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pm8001_ha = sha->lldd_ha;
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if (unlikely(!pm8001_ha))
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return IRQ_NONE;
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if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
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return IRQ_NONE;
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pm8001_ha->int_vector = 0;
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#ifdef PM8001_USE_TASKLET
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tasklet_schedule(&pm8001_ha->tasklet);
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#else
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@ -427,6 +465,10 @@ static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev,
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pm8001_ha->iomb_size = IOMB_SIZE_SPC;
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#ifdef PM8001_USE_TASKLET
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/**
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* default tasklet for non msi-x interrupt handler/first msi-x
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* interrupt handler
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**/
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tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
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(unsigned long)pm8001_ha);
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#endif
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@ -591,31 +633,50 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
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* @chip_info: our ha struct.
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* @irq_handler: irq_handler
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*/
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static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha,
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irq_handler_t irq_handler)
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static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha)
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{
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u32 i = 0, j = 0;
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u32 number_of_intr = 1;
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u32 number_of_intr;
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int flag = 0;
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u32 max_entry;
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int rc;
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static char intr_drvname[PM8001_MAX_MSIX_VEC][sizeof(DRV_NAME)+3];
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/* SPCv controllers supports 64 msi-x */
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if (pm8001_ha->chip_id == chip_8001) {
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number_of_intr = 1;
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flag |= IRQF_DISABLED;
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} else {
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number_of_intr = PM8001_MAX_MSIX_VEC;
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flag &= ~IRQF_SHARED;
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flag |= IRQF_DISABLED;
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}
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max_entry = sizeof(pm8001_ha->msix_entries) /
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sizeof(pm8001_ha->msix_entries[0]);
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flag |= IRQF_DISABLED;
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for (i = 0; i < max_entry ; i++)
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pm8001_ha->msix_entries[i].entry = i;
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rc = pci_enable_msix(pm8001_ha->pdev, pm8001_ha->msix_entries,
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number_of_intr);
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pm8001_ha->number_of_intr = number_of_intr;
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if (!rc) {
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PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
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"pci_enable_msix request ret:%d no of intr %d\n",
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rc, pm8001_ha->number_of_intr));
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for (i = 0; i < number_of_intr; i++)
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pm8001_ha->outq[i] = i;
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for (i = 0; i < number_of_intr; i++) {
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snprintf(intr_drvname[i], sizeof(intr_drvname[0]),
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DRV_NAME"%d", i);
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if (request_irq(pm8001_ha->msix_entries[i].vector,
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irq_handler, flag, DRV_NAME,
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SHOST_TO_SAS_HA(pm8001_ha->shost))) {
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pm8001_interrupt_handler_msix, flag,
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intr_drvname[i], &pm8001_ha->outq[i])) {
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for (j = 0; j < i; j++)
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free_irq(
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pm8001_ha->msix_entries[j].vector,
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SHOST_TO_SAS_HA(pm8001_ha->shost));
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&pm8001_ha->outq[j]);
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pci_disable_msix(pm8001_ha->pdev);
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break;
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}
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@ -632,22 +693,24 @@ static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha,
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static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
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{
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struct pci_dev *pdev;
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irq_handler_t irq_handler = pm8001_interrupt;
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int rc;
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pdev = pm8001_ha->pdev;
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#ifdef PM8001_USE_MSIX
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if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
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return pm8001_setup_msix(pm8001_ha, irq_handler);
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else
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return pm8001_setup_msix(pm8001_ha);
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else {
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PM8001_INIT_DBG(pm8001_ha,
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pm8001_printk("MSIX not supported!!!\n"));
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goto intx;
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}
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#endif
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intx:
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/* initialize the INT-X interrupt */
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rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, DRV_NAME,
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SHOST_TO_SAS_HA(pm8001_ha->shost));
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rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED,
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DRV_NAME, SHOST_TO_SAS_HA(pm8001_ha->shost));
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return rc;
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}
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@ -665,6 +728,7 @@ static int pm8001_pci_probe(struct pci_dev *pdev,
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{
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unsigned int rc;
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u32 pci_reg;
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u8 i = 0;
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struct pm8001_hba_info *pm8001_ha;
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struct Scsi_Host *shost = NULL;
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const struct pm8001_chip_info *chip;
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@ -729,6 +793,11 @@ static int pm8001_pci_probe(struct pci_dev *pdev,
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goto err_out_shost;
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PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
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if (pm8001_ha->chip_id != chip_8001) {
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for (i = 1; i < pm8001_ha->number_of_intr; i++)
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PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i);
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}
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pm8001_init_sas_add(pm8001_ha);
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pm8001_post_sas_ha_init(shost, chip);
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rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
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@ -764,14 +833,15 @@ static void pm8001_pci_remove(struct pci_dev *pdev)
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sas_remove_host(pm8001_ha->shost);
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list_del(&pm8001_ha->list);
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scsi_remove_host(pm8001_ha->shost);
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PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0);
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PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
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PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
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#ifdef PM8001_USE_MSIX
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for (i = 0; i < pm8001_ha->number_of_intr; i++)
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synchronize_irq(pm8001_ha->msix_entries[i].vector);
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for (i = 0; i < pm8001_ha->number_of_intr; i++)
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free_irq(pm8001_ha->msix_entries[i].vector, sha);
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free_irq(pm8001_ha->msix_entries[i].vector,
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&pm8001_ha->outq[i]);
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pci_disable_msix(pdev);
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#else
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free_irq(pm8001_ha->irq, sha);
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@ -808,13 +878,14 @@ static int pm8001_pci_suspend(struct pci_dev *pdev, pm_message_t state)
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printk(KERN_ERR " PCI PM not supported\n");
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return -ENODEV;
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}
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PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0);
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PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
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PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
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#ifdef PM8001_USE_MSIX
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for (i = 0; i < pm8001_ha->number_of_intr; i++)
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synchronize_irq(pm8001_ha->msix_entries[i].vector);
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for (i = 0; i < pm8001_ha->number_of_intr; i++)
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free_irq(pm8001_ha->msix_entries[i].vector, sha);
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free_irq(pm8001_ha->msix_entries[i].vector,
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&pm8001_ha->outq[i]);
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pci_disable_msix(pdev);
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#else
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free_irq(pm8001_ha->irq, sha);
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@ -843,6 +914,7 @@ static int pm8001_pci_resume(struct pci_dev *pdev)
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struct sas_ha_struct *sha = pci_get_drvdata(pdev);
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struct pm8001_hba_info *pm8001_ha;
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int rc;
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u8 i = 0;
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u32 device_state;
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pm8001_ha = sha->lldd_ha;
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device_state = pdev->current_state;
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@ -869,15 +941,24 @@ static int pm8001_pci_resume(struct pci_dev *pdev)
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rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
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if (rc)
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goto err_out_disable;
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PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0);
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/* disable all the interrupt bits */
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PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
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rc = pm8001_request_irq(pm8001_ha);
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if (rc)
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goto err_out_disable;
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#ifdef PM8001_USE_TASKLET
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/* default tasklet for non msi-x interrupt handler/first msi-x
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* interrupt handler */
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tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
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(unsigned long)pm8001_ha);
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#endif
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PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
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if (pm8001_ha->chip_id != chip_8001) {
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for (i = 1; i < pm8001_ha->number_of_intr; i++)
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PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i);
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}
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scsi_unblock_requests(pm8001_ha->shost);
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return 0;
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@ -453,7 +453,9 @@ struct pm8001_hba_info {
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#endif
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u32 logging_level;
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u32 fw_status;
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u32 int_vector;
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const struct firmware *fw_image;
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u8 outq[PM8001_MAX_MSIX_VEC];
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};
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struct pm8001_work {
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