FEX-Emu/linux
1
0
Fork 0
mirror of https://github.com/FEX-Emu/linux.git synced 2024-12-21 00:42:16 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[POWERPC] 4xx: Add Kilauea PCIe support to dts and Kconfig

Browse Source 
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This commit is contained in:
Stefan Roese 2007-12-07 20:34:26 +11:00 committed by Josh Boyer
parent 0a6ea8bef1
commit 151161c6e2
2 changed files with 83 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

82
arch/powerpc/boot/dts/kilauea.dts
View File

@ -253,5 +253,87 @@
has-new-stacr-staopc;
};
};
PCIE0: pciex@0a0000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
port = <0>; /* port number */
reg = <a0000000 20000000 /* Config space access */
ef000000 00001000>; /* Registers */
dcr-reg = <040 020>;
sdr-base = <400>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <02000000 0 80000000 90000000 0 08000000
01000000 0 00000000 e0000000 0 00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 80000000>;
/* This drives busses 0x00 to 0x0f */
bus-range = <00 0f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
* We are de-swizzling here because the numbers are actually for
* port of the root complex virtual P2P bridge. But I want
* to avoid putting a node for it in the tree, so the numbers
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
interrupt-map-mask = <0000 0 0 7>;
interrupt-map = <
0000 0 0 1 &UIC2 0 4 /* swizzled int A */
0000 0 0 2 &UIC2 1 4 /* swizzled int B */
0000 0 0 3 &UIC2 2 4 /* swizzled int C */
0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
};
PCIE1: pciex@0c0000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
port = <1>; /* port number */
reg = <c0000000 20000000 /* Config space access */
ef001000 00001000>; /* Registers */
dcr-reg = <060 020>;
sdr-base = <440>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
ranges = <02000000 0 80000000 98000000 0 08000000
01000000 0 00000000 e0010000 0 00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <42000000 0 0 0 0 80000000>;
/* This drives busses 0x10 to 0x1f */
bus-range = <10 1f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
* We are de-swizzling here because the numbers are actually for
* port of the root complex virtual P2P bridge. But I want
* to avoid putting a node for it in the tree, so the numbers
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
interrupt-map-mask = <0000 0 0 7>;
interrupt-map = <
0000 0 0 1 &UIC2 b 4 /* swizzled int A */
0000 0 0 2 &UIC2 c 4 /* swizzled int B */
0000 0 0 3 &UIC2 d 4 /* swizzled int C */
0000 0 0 4 &UIC2 e 4 /* swizzled int D */>;
};
};
};

1
arch/powerpc/platforms/40x/Kconfig
View File

@ -28,6 +28,7 @@ config KILAUEA
depends on 40x
default n
select 405EX
select PPC4xx_PCI_EXPRESS
help
This option enables support for the AMCC PPC405EX evaluation board.