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ARM: dts: overo: fix gpmc nand on boards with ethernet
The gpmc ranges property for NAND at CS0 was being overridden by later includes that defined gpmc ethernet nodes, effectively breaking NAND on these systems: omap-gpmc 6e000000.gpmc: /ocp/gpmc@6e000000/nand@0,0 has malformed 'reg' property Instead of redefining the NAND range in every such dtsi, define all currently used ranges in omap3-overo-base.dtsi. Fixes: 98ce6007efb4 ("ARM: dts: overo: Support PoP NAND") Cc: stable <stable@vger.kernel.org> # 4.3 Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -223,7 +223,9 @@
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0 */
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ranges = <0 0 0x30000000 0x1000000>, /* CS0 */
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<4 0 0x2b000000 0x1000000>, /* CS4 */
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<5 0 0x2c000000 0x1000000>; /* CS5 */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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@ -55,8 +55,6 @@
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#include "omap-gpmc-smsc9221.dtsi"
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&gpmc {
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ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */
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ethernet@gpmc {
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reg = <5 0 0xff>;
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interrupt-parent = <&gpio6>;
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@ -27,8 +27,6 @@
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#include "omap-gpmc-smsc9221.dtsi"
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&gpmc {
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ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */
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ethernet@gpmc {
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reg = <5 0 0xff>;
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interrupt-parent = <&gpio6>;
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@ -15,9 +15,6 @@
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#include "omap-gpmc-smsc9221.dtsi"
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&gpmc {
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ranges = <4 0 0x2b000000 0x1000000>, /* CS4 */
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<5 0 0x2c000000 0x1000000>; /* CS5 */
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smsc1: ethernet@gpmc {
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reg = <5 0 0xff>;
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interrupt-parent = <&gpio6>;
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