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x86: use apic_*_around instead of apic_write in x86_64
This patch replaces apic_read() for apic_read_around() and apic_write for apic_write_around() in smpboot_64.c We do it to have a common usage between x86_64 and i386. In the former, it will always simply expand to apic_write Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -281,8 +281,8 @@ static void inquire_remote_apic(int apicid)
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printk(KERN_CONT
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printk(KERN_CONT
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"a previous APIC delivery may have failed\n");
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"a previous APIC delivery may have failed\n");
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
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apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);
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apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
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timeout = 0;
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timeout = 0;
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do {
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do {
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@ -315,12 +315,12 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
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/*
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/*
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* Turn INIT on target chip
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* Turn INIT on target chip
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*/
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*/
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/*
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/*
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* Send IPI
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* Send IPI
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*/
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*/
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apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
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apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
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| APIC_DM_INIT);
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| APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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Dprintk("Waiting for send to finish...\n");
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@ -331,10 +331,10 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
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Dprintk("Deasserting INIT.\n");
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Dprintk("Deasserting INIT.\n");
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/* Target chip */
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/* Target chip */
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Send IPI */
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/* Send IPI */
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apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
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apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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send_status = safe_apic_wait_icr_idle();
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@ -353,6 +353,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
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for (j = 1; j <= num_starts; j++) {
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for (j = 1; j <= num_starts; j++) {
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Dprintk("Sending STARTUP #%d.\n",j);
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Dprintk("Sending STARTUP #%d.\n",j);
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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apic_read(APIC_ESR);
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Dprintk("After apic_write.\n");
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Dprintk("After apic_write.\n");
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@ -362,11 +363,11 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
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*/
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*/
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/* Target chip */
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/* Target chip */
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apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Boot on the stack */
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/* Boot on the stack */
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/* Kick the second */
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/* Kick the second */
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apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));
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apic_write_around(APIC_ICR, APIC_DM_STARTUP | (start_rip>>12));
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/*
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/*
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* Give the other CPU some time to accept the IPI.
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* Give the other CPU some time to accept the IPI.
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@ -386,6 +387,7 @@ static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int sta
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* Due to the Pentium erratum 3AP.
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* Due to the Pentium erratum 3AP.
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*/
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*/
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if (maxlvt > 3) {
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if (maxlvt > 3) {
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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apic_write(APIC_ESR, 0);
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}
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}
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accept_status = (apic_read(APIC_ESR) & 0xEF);
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accept_status = (apic_read(APIC_ESR) & 0xEF);
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