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https://github.com/FEX-Emu/linux.git
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pinctrl: stm32: add possibility to use gpio-ranges to declare bank range
Use device tree entries to declare gpio range. It will allow to use no contiguous gpio bank and holes inside a bank. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
5715092a45
commit
1dc9d28915
@ -71,6 +71,7 @@ struct stm32_gpio_bank {
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struct pinctrl_gpio_range range;
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struct fwnode_handle *fwnode;
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struct irq_domain *domain;
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u32 bank_nr;
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};
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struct stm32_pinctrl {
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@ -138,6 +139,17 @@ static inline void __stm32_gpio_set(struct stm32_gpio_bank *bank,
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static int stm32_gpio_request(struct gpio_chip *chip, unsigned offset)
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{
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struct stm32_gpio_bank *bank = gpiochip_get_data(chip);
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struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
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struct pinctrl_gpio_range *range;
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int pin = offset + (bank->bank_nr * STM32_GPIO_PINS_PER_BANK);
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range = pinctrl_find_gpio_range_from_pin_nolock(pctl->pctl_dev, pin);
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if (!range) {
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dev_err(pctl->dev, "pin %d not in range.\n", pin);
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return -EINVAL;
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}
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return pinctrl_request_gpio(chip->base + offset);
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}
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@ -235,7 +247,7 @@ static void stm32_gpio_domain_activate(struct irq_domain *d,
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struct stm32_gpio_bank *bank = d->host_data;
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struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
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regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->range.id);
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regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_nr);
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gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq);
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}
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@ -589,7 +601,7 @@ static int stm32_pmx_set_mux(struct pinctrl_dev *pctldev,
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}
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range = pinctrl_find_gpio_range_from_pin(pctldev, g->pin);
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bank = gpio_range_to_bank(range);
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bank = gpiochip_get_data(range->gc);
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pin = stm32_gpio_pin(g->pin);
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mode = stm32_gpio_get_mode(function);
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@ -604,7 +616,7 @@ static int stm32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned gpio,
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bool input)
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{
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struct stm32_gpio_bank *bank = gpio_range_to_bank(range);
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struct stm32_gpio_bank *bank = gpiochip_get_data(range->gc);
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int pin = stm32_gpio_pin(gpio);
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stm32_pmx_set_mode(bank, pin, !input, 0);
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@ -762,7 +774,7 @@ static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev,
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int offset, ret = 0;
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range = pinctrl_find_gpio_range_from_pin(pctldev, pin);
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bank = gpio_range_to_bank(range);
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bank = gpiochip_get_data(range->gc);
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offset = stm32_gpio_pin(pin);
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switch (param) {
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@ -843,7 +855,7 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev,
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bool val;
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range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
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bank = gpio_range_to_bank(range);
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bank = gpiochip_get_data(range->gc);
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offset = stm32_gpio_pin(pin);
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stm32_pmx_get_mode(bank, offset, &mode, &alt);
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@ -898,13 +910,14 @@ static const struct pinconf_ops stm32_pconf_ops = {
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static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
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struct device_node *np)
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{
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int bank_nr = pctl->nbanks;
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struct stm32_gpio_bank *bank = &pctl->banks[bank_nr];
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struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks];
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struct pinctrl_gpio_range *range = &bank->range;
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struct of_phandle_args args;
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struct device *dev = pctl->dev;
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struct resource res;
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struct reset_control *rstc;
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int err, npins;
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int npins = STM32_GPIO_PINS_PER_BANK;
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int bank_nr, err;
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rstc = of_reset_control_get(np, NULL);
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if (!IS_ERR(rstc))
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@ -929,28 +942,33 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
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return err;
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}
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npins = pctl->match_data->npins;
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npins -= bank_nr * STM32_GPIO_PINS_PER_BANK;
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if (npins < 0)
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return -EINVAL;
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else if (npins > STM32_GPIO_PINS_PER_BANK)
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npins = STM32_GPIO_PINS_PER_BANK;
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bank->gpio_chip = stm32_gpio_template;
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of_property_read_string(np, "st,bank-name", &bank->gpio_chip.label);
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if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args)) {
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bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
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bank->gpio_chip.base = args.args[1];
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} else {
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bank_nr = pctl->nbanks;
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bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
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range->name = bank->gpio_chip.label;
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range->id = bank_nr;
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range->pin_base = range->id * STM32_GPIO_PINS_PER_BANK;
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range->base = range->id * STM32_GPIO_PINS_PER_BANK;
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range->npins = npins;
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range->gc = &bank->gpio_chip;
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pinctrl_add_gpio_range(pctl->pctl_dev,
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&pctl->banks[bank_nr].range);
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}
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bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
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bank->gpio_chip.ngpio = npins;
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bank->gpio_chip.of_node = np;
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bank->gpio_chip.parent = dev;
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bank->bank_nr = bank_nr;
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spin_lock_init(&bank->lock);
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of_property_read_string(np, "st,bank-name", &range->name);
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bank->gpio_chip.label = range->name;
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range->id = bank_nr;
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range->pin_base = range->base = range->id * STM32_GPIO_PINS_PER_BANK;
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range->npins = bank->gpio_chip.ngpio;
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range->gc = &bank->gpio_chip;
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/* create irq hierarchical domain */
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bank->fwnode = of_node_to_fwnode(np);
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@ -967,7 +985,7 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
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return err;
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}
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dev_info(dev, "%s bank added\n", range->name);
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dev_info(dev, "%s bank added\n", bank->gpio_chip.label);
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return 0;
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}
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@ -1086,30 +1104,6 @@ int stm32_pctl_probe(struct platform_device *pdev)
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return ret;
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}
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for_each_child_of_node(np, child)
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if (of_property_read_bool(child, "gpio-controller"))
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banks++;
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if (!banks) {
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dev_err(dev, "at least one GPIO bank is required\n");
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return -EINVAL;
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}
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pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks),
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GFP_KERNEL);
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if (!pctl->banks)
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return -ENOMEM;
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for_each_child_of_node(np, child) {
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if (of_property_read_bool(child, "gpio-controller")) {
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ret = stm32_gpiolib_register_bank(pctl, child);
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if (ret)
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return ret;
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pctl->nbanks++;
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}
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}
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pins = devm_kcalloc(&pdev->dev, pctl->match_data->npins, sizeof(*pins),
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GFP_KERNEL);
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if (!pins)
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@ -1129,13 +1123,34 @@ int stm32_pctl_probe(struct platform_device *pdev)
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pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc,
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pctl);
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if (IS_ERR(pctl->pctl_dev)) {
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dev_err(&pdev->dev, "Failed pinctrl registration\n");
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return PTR_ERR(pctl->pctl_dev);
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}
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for (i = 0; i < pctl->nbanks; i++)
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pinctrl_add_gpio_range(pctl->pctl_dev, &pctl->banks[i].range);
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for_each_child_of_node(np, child)
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if (of_property_read_bool(child, "gpio-controller"))
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banks++;
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if (!banks) {
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dev_err(dev, "at least one GPIO bank is required\n");
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return -EINVAL;
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}
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pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks),
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GFP_KERNEL);
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if (!pctl->banks)
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return -ENOMEM;
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for_each_child_of_node(np, child) {
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if (of_property_read_bool(child, "gpio-controller")) {
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ret = stm32_gpiolib_register_bank(pctl, child);
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if (ret)
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return ret;
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pctl->nbanks++;
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}
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}
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dev_info(dev, "Pinctrl STM32 initialized\n");
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