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arm64: KVM: Add support for 16-bit VMID
The ARMv8.1 architecture extension allows to choose between 8-bit and 16-bit of VMID, so use this capability for KVM. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -164,7 +164,7 @@
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#define VTTBR_BADDR_SHIFT (VTTBR_X - 1)
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#define VTTBR_BADDR_MASK (((_AC(1, ULL) << (40 - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT)
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#define VTTBR_VMID_SHIFT _AC(48, ULL)
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#define VTTBR_VMID_MASK (_AC(0xff, ULL) << VTTBR_VMID_SHIFT)
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#define VTTBR_VMID_MASK(size) (_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT)
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/* Hyp Syndrome Register (HSR) bits */
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#define HSR_EC_SHIFT (26)
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@ -279,6 +279,11 @@ static inline void __kvm_extend_hypmap(pgd_t *boot_hyp_pgd,
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pgd_t *merged_hyp_pgd,
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unsigned long hyp_idmap_start) { }
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static inline unsigned int kvm_get_vmid_bits(void)
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{
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return 8;
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* __ARM_KVM_MMU_H__ */
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@ -59,7 +59,8 @@ static DEFINE_PER_CPU(struct kvm_vcpu *, kvm_arm_running_vcpu);
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/* The VMID used in the VTTBR */
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static atomic64_t kvm_vmid_gen = ATOMIC64_INIT(1);
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static u8 kvm_next_vmid;
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static u32 kvm_next_vmid;
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static unsigned int kvm_vmid_bits __read_mostly;
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static DEFINE_SPINLOCK(kvm_vmid_lock);
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static void kvm_arm_set_running_vcpu(struct kvm_vcpu *vcpu)
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@ -434,11 +435,12 @@ static void update_vttbr(struct kvm *kvm)
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kvm->arch.vmid_gen = atomic64_read(&kvm_vmid_gen);
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kvm->arch.vmid = kvm_next_vmid;
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kvm_next_vmid++;
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kvm_next_vmid &= (1 << kvm_vmid_bits) - 1;
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/* update vttbr to be used with the new vmid */
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pgd_phys = virt_to_phys(kvm_get_hwpgd(kvm));
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BUG_ON(pgd_phys & ~VTTBR_BADDR_MASK);
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vmid = ((u64)(kvm->arch.vmid) << VTTBR_VMID_SHIFT) & VTTBR_VMID_MASK;
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vmid = ((u64)(kvm->arch.vmid) << VTTBR_VMID_SHIFT) & VTTBR_VMID_MASK(kvm_vmid_bits);
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kvm->arch.vttbr = pgd_phys | vmid;
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spin_unlock(&kvm_vmid_lock);
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@ -1135,6 +1137,10 @@ static int init_hyp_mode(void)
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kvm_perf_init();
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/* set size of VMID supported by CPU */
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kvm_vmid_bits = kvm_get_vmid_bits();
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kvm_info("%d-bit VMID\n", kvm_vmid_bits);
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kvm_info("Hyp mode initialized successfully\n");
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return 0;
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@ -125,6 +125,7 @@
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#define VTCR_EL2_SL0_LVL1 (1 << 6)
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#define VTCR_EL2_T0SZ_MASK 0x3f
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#define VTCR_EL2_T0SZ_40B 24
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#define VTCR_EL2_VS 19
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/*
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* We configure the Stage-2 page tables to always restrict the IPA space to be
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@ -169,7 +170,7 @@
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#define VTTBR_BADDR_SHIFT (VTTBR_X - 1)
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#define VTTBR_BADDR_MASK (((UL(1) << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT)
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#define VTTBR_VMID_SHIFT (UL(48))
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#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)
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#define VTTBR_VMID_MASK(size) (_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT)
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/* Hyp System Trap Register */
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#define HSTR_EL2_T(x) (1 << x)
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@ -20,6 +20,7 @@
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#include <asm/page.h>
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#include <asm/memory.h>
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#include <asm/cpufeature.h>
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/*
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* As we only have the TTBR0_EL2 register, we cannot express
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@ -301,5 +302,12 @@ static inline void __kvm_extend_hypmap(pgd_t *boot_hyp_pgd,
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merged_hyp_pgd[idmap_idx] = __pgd(__pa(boot_hyp_pgd) | PMD_TYPE_TABLE);
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}
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static inline unsigned int kvm_get_vmid_bits(void)
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{
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int reg = read_system_reg(SYS_ID_AA64MMFR1_EL1);
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return (cpuid_feature_extract_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ARM64_KVM_MMU_H__ */
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@ -94,6 +94,15 @@ __do_hyp_init:
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*/
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mrs x5, ID_AA64MMFR0_EL1
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bfi x4, x5, #16, #3
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/*
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* Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in
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* VTCR_EL2.
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*/
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mrs x5, ID_AA64MMFR1_EL1
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ubfx x5, x5, #5, #1
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lsl x5, x5, #VTCR_EL2_VS
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orr x4, x4, x5
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msr vtcr_el2, x4
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mrs x4, mair_el1
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