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ARM i.MX: Two fixes for i.MX
- armadillo5x0 board broken since v3.5 (stable material) - i.MX25 Architecture broken since v3.6-rc1 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABCAAGBQJQWIlrAAoJEPFlmONMx+ezJTYP/3b7RbyCRfrYKebiytkmeaDc VDxsQekF3wANL8e0B2sZPY6TG8nagnAro2DvoJZJDMSx560JdIHEyMnzc11o0Gj7 KE5XmiJFEyO/KNlZXVdv6LUohz97QNn475vjWcMQll1DYAXeRD3O5MstS23NBWc9 HzNoVgG4wqlUPA+d4Y/+IMcnyRBgOzIQGO3ICoVp6GXJP9/9GXtUIaTWo4dQfMGB PT4W4c3QWsfHsuSbF5I53NVzMqMc7d86sY/WIu+qaUY1phlwB+yCBgpd0iHT9COI ph83LEur7COyeD2C7jCQJ5JNhD6qSqd8egOZXr/4CErTLAxqOsB3l736RoquBFbt L6PDo/SgeUvVW7Oeb2I3tzMML5UfvmHoewN7gUOgNlCn+cIBI38xb9STKmrBeJAV xxdxwr721d9Lt6ANmmkP5ZOO0AEJcoECRMnVamoXYjmIavg9kgVaktsPI4TaSm0f VyWt7qZGdjgdo/7wyZPcUoY67/E37n5yEATutl35ftjxIDkBFgHXU7VyZGSBYLhx vdteC7+islHf1b5jG1OlBDJT2YqKbZ57rmoYeJpAbZ/o2sDi2mjceuTPKSJkt5cd y+2CBZ3phQpMOgHVjEaurYZ5hDlGF3u6cM9yX8AxXrMk94TmgXoXzg/jvmzEVVuX rI78Y0Wto4EVsdOygVuw =2lcv -----END PGP SIGNATURE----- Merge tag 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes From Sascha Hauer: ARM i.MX: Two fixes for i.MX - armadillo5x0 board broken since v3.5 (stable material) - i.MX25 Architecture broken since v3.6-rc1 * tag 'imx-fixes' of git://git.pengutronix.de/git/imx/linux-2.6: ARM i.MX25: Make timer irq work again ARM: imx: armadillo5x0: Fix illegal register access
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23f3f0613f
@ -241,6 +241,6 @@ int __init mx25_clocks_init(void)
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clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
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clk_register_clkdev(clk[iim_ipg], "iim", NULL);
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mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
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mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
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return 0;
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}
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@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
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imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
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/* set NAND page size to 2k if not configured via boot mode pins */
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__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
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__raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
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(1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
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/* RTC */
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/* Get RTC IRQ and register the chip */
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@ -98,6 +98,7 @@
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#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
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#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
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#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
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#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
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#define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
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#define MX25_DMA_REQ_SSI2_RX1 22
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