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m68knommu: make 5249 QSPI platform addressing consistent

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If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.

So modify the ColdFire 5249 QSPI addressing so that:

. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2011-12-24 12:38:40 +10:00
parent 36d175a4b2
commit 2424f54902
3 changed files with 13 additions and 9 deletions
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11
arch/m68k/include/asm/m5249sim.h
View File

@ -79,6 +79,17 @@
#define MCFUART_BASE0 (MCF_MBAR + 0x1c0) /* Base address UART0 */
#define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */
/*
* QSPI module.
*/
#define MCFQSPI_BASE (MCF_MBAR + 0x300) /* Base address QSPI */
#define MCFQSPI_SIZE 0x40 /* Register set size */
#define MCFQSPI_CS0 29
#define MCFQSPI_CS1 24
#define MCFQSPI_CS2 21
#define MCFQSPI_CS3 22
/*
* DMA unit base addresses.
*/

2
arch/m68k/include/asm/mcfqspi.h
View File

@ -23,8 +23,6 @@
#if defined(CONFIG_M527x) || defined(CONFIG_M528x)
#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340)
#elif defined(CONFIG_M5249)
#define MCFQSPI_IOBASE (MCF_MBAR + 0x300)
#elif defined(CONFIG_M532x)
#define MCFQSPI_IOBASE 0xFC058000
#endif

9
arch/m68k/platform/5249/config.c
View File

@ -48,8 +48,8 @@ static struct platform_device m5249_smc91x = {
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
static struct resource m5249_qspi_resources[] = {
{
.start = MCFQSPI_IOBASE,
.end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
.start = MCFQSPI_BASE,
.end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
.flags = IORESOURCE_MEM,
},
{
@ -59,11 +59,6 @@ static struct resource m5249_qspi_resources[] = {
},
};
#define MCFQSPI_CS0 29
#define MCFQSPI_CS1 24
#define MCFQSPI_CS2 21
#define MCFQSPI_CS3 22
static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control)
{
int status;