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Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux into next

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Freescale updates from Scott:

"Highlights include BMan device tree nodes, an MSI erratum workaround, a
couple minor performance improvements, config updates, and misc
fixes/cleanup."
This commit is contained in:
Michael Ellerman 2015-04-07 13:07:42 +10:00
commit 28ea605caa
41 changed files with 981 additions and 284 deletions
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223
arch/powerpc/boot/dts/b4860emu.dts
View File

@ -1,223 +0,0 @@
/*
* B4860 emulator Device Tree Source
*
* Copyright 2013 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* This software is provided by Freescale Semiconductor "as is" and any
* express or implied warranties, including, but not limited to, the implied
* warranties of merchantability and fitness for a particular purpose are
* disclaimed. In no event shall Freescale Semiconductor be liable for any
* direct, indirect, incidental, special, exemplary, or consequential damages
* (including, but not limited to, procurement of substitute goods or services;
* loss of use, data, or profits; or business interruption) however caused and
* on any theory of liability, whether in contract, strict liability, or tort
* (including negligence or otherwise) arising in any way out of the use of
* this software, even if advised of the possibility of such damage.
*/
/dts-v1/;
/include/ "fsl/e6500_power_isa.dtsi"
/ {
compatible = "fsl,B4860";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
aliases {
ccsr = &soc;
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
dma0 = &dma0;
dma1 = &dma1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
next-level-cache = <&L2>;
fsl,portid-mapping = <0x80000000>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
next-level-cache = <&L2>;
fsl,portid-mapping = <0x80000000>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
next-level-cache = <&L2>;
fsl,portid-mapping = <0x80000000>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
next-level-cache = <&L2>;
fsl,portid-mapping = <0x80000000>;
};
};
};
/ {
model = "fsl,B4860QDS";
compatible = "fsl,B4860EMU", "fsl,B4860QDS";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
ifc: localbus@ffe124000 {
reg = <0xf 0xfe124000 0 0x2000>;
ranges = <0 0 0xf 0xe8000000 0x08000000
2 0 0xf 0xff800000 0x00010000
3 0 0xf 0xffdf0000 0x00008000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
};
};
memory {
device_type = "memory";
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
};
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,ifc", "simple-bus";
interrupts = <25 2 0 0>;
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
soc-sram-error {
compatible = "fsl,soc-sram-error";
interrupts = <16 2 1 2>;
};
corenet-law@0 {
compatible = "fsl,corenet-law";
reg = <0x0 0x1000>;
fsl,num-laws = <32>;
};
ddr1: memory-controller@8000 {
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
reg = <0x8000 0x1000>;
interrupts = <16 2 1 8>;
};
ddr2: memory-controller@9000 {
compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
reg = <0x9000 0x1000>;
interrupts = <16 2 1 9>;
};
cpc: l3-cache-controller@10000 {
compatible = "fsl,b4-l3-cache-controller", "cache";
reg = <0x10000 0x1000
0x11000 0x1000>;
interrupts = <16 2 1 4>;
};
corenet-cf@18000 {
compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
reg = <0x18000 0x1000>;
interrupts = <16 2 1 0>;
fsl,ccf-num-csdids = <32>;
fsl,ccf-num-snoopids = <32>;
};
iommu@20000 {
compatible = "fsl,pamu-v1.0", "fsl,pamu";
reg = <0x20000 0x4000>;
fsl,portid-mapping = <0x8000>;
#address-cells = <1>;
#size-cells = <1>;
interrupts = <
24 2 0 0
16 2 1 1>;
pamu0: pamu@0 {
reg = <0 0x1000>;
fsl,primary-cache-geometry = <8 1>;
fsl,secondary-cache-geometry = <32 2>;
};
};
/include/ "fsl/qoriq-mpic.dtsi"
guts: global-utilities@e0000 {
compatible = "fsl,b4-device-config";
reg = <0xe0000 0xe00>;
fsl,has-rstcr;
fsl,liodn-bits = <12>;
};
/include/ "fsl/qoriq-clockgen2.dtsi"
global-utilities@e1000 {
compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
};
/include/ "fsl/qoriq-dma-0.dtsi"
dma@100300 {
fsl,iommu-parent = <&pamu0>;
fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
};
/include/ "fsl/qoriq-dma-1.dtsi"
dma@101300 {
fsl,iommu-parent = <&pamu0>;
fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
};
/include/ "fsl/qoriq-i2c-0.dtsi"
/include/ "fsl/qoriq-i2c-1.dtsi"
/include/ "fsl/qoriq-duart-0.dtsi"
/include/ "fsl/qoriq-duart-1.dtsi"
L2: l2-cache-controller@c20000 {
compatible = "fsl,b4-l2-cache-controller";
reg = <0xc20000 0x1000>;
next-level-cache = <&cpc>;
};
};

17
arch/powerpc/boot/dts/b4qds.dtsi
View File

@ -1,7 +1,7 @@
/*
* B4420DS Device Tree Source
*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2012 - 2014 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -97,10 +97,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01052000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

60
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* B4860 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -109,6 +109,64 @@
};
};
&bportals {
bman-portal@38000 {
compatible = "fsl,bman-portal";
reg = <0x38000 0x4000>, <0x100e000 0x1000>;
interrupts = <133 2 0 0>;
};
bman-portal@3c000 {
compatible = "fsl,bman-portal";
reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
interrupts = <135 2 0 0>;
};
bman-portal@40000 {
compatible = "fsl,bman-portal";
reg = <0x40000 0x4000>, <0x1010000 0x1000>;
interrupts = <137 2 0 0>;
};
bman-portal@44000 {
compatible = "fsl,bman-portal";
reg = <0x44000 0x4000>, <0x1011000 0x1000>;
interrupts = <139 2 0 0>;
};
bman-portal@48000 {
compatible = "fsl,bman-portal";
reg = <0x48000 0x4000>, <0x1012000 0x1000>;
interrupts = <141 2 0 0>;
};
bman-portal@4c000 {
compatible = "fsl,bman-portal";
reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
interrupts = <143 2 0 0>;
};
bman-portal@50000 {
compatible = "fsl,bman-portal";
reg = <0x50000 0x4000>, <0x1014000 0x1000>;
interrupts = <145 2 0 0>;
};
bman-portal@54000 {
compatible = "fsl,bman-portal";
reg = <0x54000 0x4000>, <0x1015000 0x1000>;
interrupts = <147 2 0 0>;
};
bman-portal@58000 {
compatible = "fsl,bman-portal";
reg = <0x58000 0x4000>, <0x1016000 0x1000>;
interrupts = <149 2 0 0>;
};
bman-portal@5c000 {
compatible = "fsl,bman-portal";
reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
interrupts = <151 2 0 0>;
};
bman-portal@60000 {
compatible = "fsl,bman-portal";
reg = <0x60000 0x4000>, <0x1018000 0x1000>;
interrupts = <153 2 0 0>;
};
};
&soc {
ddr2: memory-controller@9000 {
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";

89
arch/powerpc/boot/dts/fsl/b4si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* B4420 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2012 - 2014 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* this software, even if advised of the possibility of such damage.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
@ -128,6 +133,83 @@
};
};
&bportals {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x1000000 0x1000>;
interrupts = <105 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
interrupts = <107 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
interrupts = <109 2 0 0>;
};
bman-portal@c000 {
compatible = "fsl,bman-portal";
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
interrupts = <111 2 0 0>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
interrupts = <113 2 0 0>;
};
bman-portal@14000 {
compatible = "fsl,bman-portal";
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
interrupts = <115 2 0 0>;
};
bman-portal@18000 {
compatible = "fsl,bman-portal";
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
interrupts = <117 2 0 0>;
};
bman-portal@1c000 {
compatible = "fsl,bman-portal";
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
interrupts = <119 2 0 0>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
interrupts = <121 2 0 0>;
};
bman-portal@24000 {
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
interrupts = <123 2 0 0>;
};
bman-portal@28000 {
compatible = "fsl,bman-portal";
reg = <0x28000 0x4000>, <0x100a000 0x1000>;
interrupts = <125 2 0 0>;
};
bman-portal@2c000 {
compatible = "fsl,bman-portal";
reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
interrupts = <127 2 0 0>;
};
bman-portal@30000 {
compatible = "fsl,bman-portal";
reg = <0x30000 0x4000>, <0x100c000 0x1000>;
interrupts = <129 2 0 0>;
};
bman-portal@34000 {
compatible = "fsl,bman-portal";
reg = <0x34000 0x4000>, <0x100d000 0x1000>;
interrupts = <131 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -261,6 +343,11 @@
/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-sec5.3-0.dtsi"
/include/ "qoriq-bman1.dtsi"
bman: bman@31a000 {
interrupts = <16 2 1 29>;
};
L2: l2-cache-controller@c20000 {
compatible = "fsl,b4-l2-cache-controller";
reg = <0xc20000 0x1000>;

37
arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* P1023/P1017 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
#address-cells = <2>;
#size-cells = <1>;
@ -97,6 +102,28 @@
};
};
&bportals {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x100000 0x1000>;
interrupts = <30 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x101000 0x1000>;
interrupts = <32 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x102000 0x1000>;
interrupts = <34 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -221,6 +248,14 @@
/include/ "pq3-mpic.dtsi"
/include/ "pq3-mpic-timer-B.dtsi"
bman: bman@8a000 {
compatible = "fsl,bman";
reg = <0x8a000 0x1000>;
interrupts = <16 2 0 0>;
fsl,bman-portals = <&bportals>;
memory-region = <&bman_fbpr>;
};
global-utilities@e0000 {
compatible = "fsl,p1023-guts";
reg = <0xe0000 0x1000>;

11
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* P2041/P2040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
@ -216,6 +221,8 @@
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -407,4 +414,6 @@
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
};

11
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* P3041 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
@ -243,6 +248,8 @@
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -434,4 +441,6 @@
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
};

11
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* P4080/P4040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10 0>;
};
&lbc {
compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
@ -243,6 +248,8 @@
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -490,4 +497,6 @@
crypto: crypto@300000 {
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
};

11
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* P5020/5010 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&lbc {
compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
@ -240,6 +245,8 @@
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -421,6 +428,8 @@
fsl,iommu-parent = <&pamu1>;
};
/include/ "qoriq-bman1.dtsi"
/include/ "qoriq-raid1.0-0.dtsi"
raideng@320000 {
fsl,iommu-parent = <&pamu1>;

11
arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* P5040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* software, even if advised of the possibility of such damage.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&lbc {
compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
interrupts = <25 2 0 0>;
@ -195,6 +200,8 @@
};
};
/include/ "qoriq-bman1-portals.dtsi"
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -399,4 +406,6 @@
crypto@300000 {
fsl,iommu-parent = <&pamu4>;
};
/include/ "qoriq-bman1.dtsi"
};

65
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* T1040 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2013 Freescale Semiconductor Inc.
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
@ -218,6 +223,63 @@
};
};
&bportals {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x1000000 0x1000>;
interrupts = <105 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
interrupts = <107 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
interrupts = <109 2 0 0>;
};
bman-portal@c000 {
compatible = "fsl,bman-portal";
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
interrupts = <111 2 0 0>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
interrupts = <113 2 0 0>;
};
bman-portal@14000 {
compatible = "fsl,bman-portal";
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
interrupts = <115 2 0 0>;
};
bman-portal@18000 {
compatible = "fsl,bman-portal";
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
interrupts = <117 2 0 0>;
};
bman-portal@1c000 {
compatible = "fsl,bman-portal";
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
interrupts = <119 2 0 0>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
interrupts = <121 2 0 0>;
};
bman-portal@24000 {
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
interrupts = <123 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -401,4 +463,5 @@
fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
};
/include/ "qoriq-sec5.0-0.dtsi"
/include/ "qoriq-bman1.dtsi"
};

105
arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* T2081 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2013 Freescale Semiconductor Inc.
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
@ -224,6 +229,103 @@
};
};
&bportals {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x1000000 0x1000>;
interrupts = <105 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
interrupts = <107 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
interrupts = <109 2 0 0>;
};
bman-portal@c000 {
compatible = "fsl,bman-portal";
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
interrupts = <111 2 0 0>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
interrupts = <113 2 0 0>;
};
bman-portal@14000 {
compatible = "fsl,bman-portal";
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
interrupts = <115 2 0 0>;
};
bman-portal@18000 {
compatible = "fsl,bman-portal";
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
interrupts = <117 2 0 0>;
};
bman-portal@1c000 {
compatible = "fsl,bman-portal";
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
interrupts = <119 2 0 0>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
interrupts = <121 2 0 0>;
};
bman-portal@24000 {
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
interrupts = <123 2 0 0>;
};
bman-portal@28000 {
compatible = "fsl,bman-portal";
reg = <0x28000 0x4000>, <0x100a000 0x1000>;
interrupts = <125 2 0 0>;
};
bman-portal@2c000 {
compatible = "fsl,bman-portal";
reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
interrupts = <127 2 0 0>;
};
bman-portal@30000 {
compatible = "fsl,bman-portal";
reg = <0x30000 0x4000>, <0x100c000 0x1000>;
interrupts = <129 2 0 0>;
};
bman-portal@34000 {
compatible = "fsl,bman-portal";
reg = <0x34000 0x4000>, <0x100d000 0x1000>;
interrupts = <131 2 0 0>;
};
bman-portal@38000 {
compatible = "fsl,bman-portal";
reg = <0x38000 0x4000>, <0x100e000 0x1000>;
interrupts = <133 2 0 0>;
};
bman-portal@3c000 {
compatible = "fsl,bman-portal";
reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
interrupts = <135 2 0 0>;
};
bman-portal@40000 {
compatible = "fsl,bman-portal";
reg = <0x40000 0x4000>, <0x1010000 0x1000>;
interrupts = <137 2 0 0>;
};
bman-portal@44000 {
compatible = "fsl,bman-portal";
reg = <0x44000 0x4000>, <0x1011000 0x1000>;
interrupts = <139 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -400,6 +502,7 @@
phy_type = "utmi";
};
/include/ "qoriq-sec5.2-0.dtsi"
/include/ "qoriq-bman1.dtsi"
L2_1: l2-cache-controller@c20000 {
/* Cluster 0 L2 cache */

265
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
View File

@ -1,7 +1,7 @@
/*
* T4240 Silicon/SoC Device Tree Source (post include)
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -32,6 +32,11 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
};
&ifc {
#address-cells = <2>;
#size-cells = <1>;
@ -294,6 +299,263 @@
};
};
&bportals {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "simple-bus";
bman-portal@0 {
compatible = "fsl,bman-portal";
reg = <0x0 0x4000>, <0x1000000 0x1000>;
interrupts = <105 2 0 0>;
};
bman-portal@4000 {
compatible = "fsl,bman-portal";
reg = <0x4000 0x4000>, <0x1001000 0x1000>;
interrupts = <107 2 0 0>;
};
bman-portal@8000 {
compatible = "fsl,bman-portal";
reg = <0x8000 0x4000>, <0x1002000 0x1000>;
interrupts = <109 2 0 0>;
};
bman-portal@c000 {
compatible = "fsl,bman-portal";
reg = <0xc000 0x4000>, <0x1003000 0x1000>;
interrupts = <111 2 0 0>;
};
bman-portal@10000 {
compatible = "fsl,bman-portal";
reg = <0x10000 0x4000>, <0x1004000 0x1000>;
interrupts = <113 2 0 0>;
};
bman-portal@14000 {
compatible = "fsl,bman-portal";
reg = <0x14000 0x4000>, <0x1005000 0x1000>;
interrupts = <115 2 0 0>;
};
bman-portal@18000 {
compatible = "fsl,bman-portal";
reg = <0x18000 0x4000>, <0x1006000 0x1000>;
interrupts = <117 2 0 0>;
};
bman-portal@1c000 {
compatible = "fsl,bman-portal";
reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
interrupts = <119 2 0 0>;
};
bman-portal@20000 {
compatible = "fsl,bman-portal";
reg = <0x20000 0x4000>, <0x1008000 0x1000>;
interrupts = <121 2 0 0>;
};
bman-portal@24000 {
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x1009000 0x1000>;
interrupts = <123 2 0 0>;
};
bman-portal@28000 {
compatible = "fsl,bman-portal";
reg = <0x28000 0x4000>, <0x100a000 0x1000>;
interrupts = <125 2 0 0>;
};
bman-portal@2c000 {
compatible = "fsl,bman-portal";
reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
interrupts = <127 2 0 0>;
};
bman-portal@30000 {
compatible = "fsl,bman-portal";
reg = <0x30000 0x4000>, <0x100c000 0x1000>;
interrupts = <129 2 0 0>;
};
bman-portal@34000 {
compatible = "fsl,bman-portal";
reg = <0x34000 0x4000>, <0x100d000 0x1000>;
interrupts = <131 2 0 0>;
};
bman-portal@38000 {
compatible = "fsl,bman-portal";
reg = <0x38000 0x4000>, <0x100e000 0x1000>;
interrupts = <133 2 0 0>;
};
bman-portal@3c000 {
compatible = "fsl,bman-portal";
reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
interrupts = <135 2 0 0>;
};
bman-portal@40000 {
compatible = "fsl,bman-portal";
reg = <0x40000 0x4000>, <0x1010000 0x1000>;
interrupts = <137 2 0 0>;
};
bman-portal@44000 {
compatible = "fsl,bman-portal";
reg = <0x44000 0x4000>, <0x1011000 0x1000>;
interrupts = <139 2 0 0>;
};
bman-portal@48000 {
compatible = "fsl,bman-portal";
reg = <0x48000 0x4000>, <0x1012000 0x1000>;
interrupts = <141 2 0 0>;
};
bman-portal@4c000 {
compatible = "fsl,bman-portal";
reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
interrupts = <143 2 0 0>;
};
bman-portal@50000 {
compatible = "fsl,bman-portal";
reg = <0x50000 0x4000>, <0x1014000 0x1000>;
interrupts = <145 2 0 0>;
};
bman-portal@54000 {
compatible = "fsl,bman-portal";
reg = <0x54000 0x4000>, <0x1015000 0x1000>;
interrupts = <147 2 0 0>;
};
bman-portal@58000 {
compatible = "fsl,bman-portal";
reg = <0x58000 0x4000>, <0x1016000 0x1000>;
interrupts = <149 2 0 0>;
};
bman-portal@5c000 {
compatible = "fsl,bman-portal";
reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
interrupts = <151 2 0 0>;
};
bman-portal@60000 {
compatible = "fsl,bman-portal";
reg = <0x60000 0x4000>, <0x1018000 0x1000>;
interrupts = <153 2 0 0>;
};
bman-portal@64000 {
compatible = "fsl,bman-portal";
reg = <0x64000 0x4000>, <0x1019000 0x1000>;
interrupts = <155 2 0 0>;
};
bman-portal@68000 {
compatible = "fsl,bman-portal";
reg = <0x68000 0x4000>, <0x101a000 0x1000>;
interrupts = <157 2 0 0>;
};
bman-portal@6c000 {
compatible = "fsl,bman-portal";
reg = <0x6c000 0x4000>, <0x101b000 0x1000>;
interrupts = <159 2 0 0>;
};
bman-portal@70000 {
compatible = "fsl,bman-portal";
reg = <0x70000 0x4000>, <0x101c000 0x1000>;
interrupts = <161 2 0 0>;
};
bman-portal@74000 {
compatible = "fsl,bman-portal";
reg = <0x74000 0x4000>, <0x101d000 0x1000>;
interrupts = <163 2 0 0>;
};
bman-portal@78000 {
compatible = "fsl,bman-portal";
reg = <0x78000 0x4000>, <0x101e000 0x1000>;
interrupts = <165 2 0 0>;
};
bman-portal@7c000 {
compatible = "fsl,bman-portal";
reg = <0x7c000 0x4000>, <0x101f000 0x1000>;
interrupts = <167 2 0 0>;
};
bman-portal@80000 {
compatible = "fsl,bman-portal";
reg = <0x80000 0x4000>, <0x1020000 0x1000>;
interrupts = <169 2 0 0>;
};
bman-portal@84000 {
compatible = "fsl,bman-portal";
reg = <0x84000 0x4000>, <0x1021000 0x1000>;
interrupts = <171 2 0 0>;
};
bman-portal@88000 {
compatible = "fsl,bman-portal";
reg = <0x88000 0x4000>, <0x1022000 0x1000>;
interrupts = <173 2 0 0>;
};
bman-portal@8c000 {
compatible = "fsl,bman-portal";
reg = <0x8c000 0x4000>, <0x1023000 0x1000>;
interrupts = <175 2 0 0>;
};
bman-portal@90000 {
compatible = "fsl,bman-portal";
reg = <0x90000 0x4000>, <0x1024000 0x1000>;
interrupts = <385 2 0 0>;
};
bman-portal@94000 {
compatible = "fsl,bman-portal";
reg = <0x94000 0x4000>, <0x1025000 0x1000>;
interrupts = <387 2 0 0>;
};
bman-portal@98000 {
compatible = "fsl,bman-portal";
reg = <0x98000 0x4000>, <0x1026000 0x1000>;
interrupts = <389 2 0 0>;
};
bman-portal@9c000 {
compatible = "fsl,bman-portal";
reg = <0x9c000 0x4000>, <0x1027000 0x1000>;
interrupts = <391 2 0 0>;
};
bman-portal@a0000 {
compatible = "fsl,bman-portal";
reg = <0xa0000 0x4000>, <0x1028000 0x1000>;
interrupts = <393 2 0 0>;
};
bman-portal@a4000 {
compatible = "fsl,bman-portal";
reg = <0xa4000 0x4000>, <0x1029000 0x1000>;
interrupts = <395 2 0 0>;
};
bman-portal@a8000 {
compatible = "fsl,bman-portal";
reg = <0xa8000 0x4000>, <0x102a000 0x1000>;
interrupts = <397 2 0 0>;
};
bman-portal@ac000 {
compatible = "fsl,bman-portal";
reg = <0xac000 0x4000>, <0x102b000 0x1000>;
interrupts = <399 2 0 0>;
};
bman-portal@b0000 {
compatible = "fsl,bman-portal";
reg = <0xb0000 0x4000>, <0x102c000 0x1000>;
interrupts = <401 2 0 0>;
};
bman-portal@b4000 {
compatible = "fsl,bman-portal";
reg = <0xb4000 0x4000>, <0x102d000 0x1000>;
interrupts = <403 2 0 0>;
};
bman-portal@b8000 {
compatible = "fsl,bman-portal";
reg = <0xb8000 0x4000>, <0x102e000 0x1000>;
interrupts = <405 2 0 0>;
};
bman-portal@bc000 {
compatible = "fsl,bman-portal";
reg = <0xbc000 0x4000>, <0x102f000 0x1000>;
interrupts = <407 2 0 0>;
};
bman-portal@c0000 {
compatible = "fsl,bman-portal";
reg = <0xc0000 0x4000>, <0x1030000 0x1000>;
interrupts = <409 2 0 0>;
};
bman-portal@c4000 {
compatible = "fsl,bman-portal";
reg = <0xc4000 0x4000>, <0x1031000 0x1000>;
interrupts = <411 2 0 0>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
@ -486,6 +748,7 @@
/include/ "qoriq-sata2-0.dtsi"
/include/ "qoriq-sata2-1.dtsi"
/include/ "qoriq-sec5.0-0.dtsi"
/include/ "qoriq-bman1.dtsi"
L2_1: l2-cache-controller@c20000 {
compatible = "fsl,t4240-l2-cache-controller";

15
arch/powerpc/boot/dts/kmcoge4.dts
View File

@ -25,10 +25,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

15
arch/powerpc/boot/dts/oca4080.dts
View File

@ -49,10 +49,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

18
arch/powerpc/boot/dts/p1023rdb.dts
View File

@ -1,7 +1,7 @@
/*
* P1023 RDB Device Tree Source
*
* Copyright 2013 Freescale Semiconductor Inc.
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Author: Chunhe Lan <Chunhe.Lan@freescale.com>
*
@ -47,6 +47,21 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
bportals: bman-portals@ff200000 {
ranges = <0x0 0xf 0xff200000 0x200000>;
};
soc: soc@ff600000 {
ranges = <0x0 0x0 0xff600000 0x200000>;
@ -228,7 +243,6 @@
0x0 0x100000>;
};
};
};
/include/ "fsl/p1023si-post.dtsi"

17
arch/powerpc/boot/dts/p2041rdb.dts
View File

@ -1,7 +1,7 @@
/*
* P2041RDB Device Tree Source
*
* Copyright 2011 Freescale Semiconductor Inc.
* Copyright 2011 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -45,10 +45,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

17
arch/powerpc/boot/dts/p3041ds.dts
View File

@ -1,7 +1,7 @@
/*
* P3041DS Device Tree Source
*
* Copyright 2010-2011 Freescale Semiconductor Inc.
* Copyright 2010 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -45,10 +45,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

17
arch/powerpc/boot/dts/p4080ds.dts
View File

@ -1,7 +1,7 @@
/*
* P4080DS Device Tree Source
*
* Copyright 2009-2011 Freescale Semiconductor Inc.
* Copyright 2009 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -45,10 +45,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

17
arch/powerpc/boot/dts/p5020ds.dts
View File

@ -1,7 +1,7 @@
/*
* P5020DS Device Tree Source
*
* Copyright 2010-2011 Freescale Semiconductor Inc.
* Copyright 2010 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -45,10 +45,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

17
arch/powerpc/boot/dts/p5040ds.dts
View File

@ -1,7 +1,7 @@
/*
* P5040DS Device Tree Source
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -45,10 +45,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x200000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

17
arch/powerpc/boot/dts/t104xqds.dtsi
View File

@ -1,7 +1,7 @@
/*
* T104xQDS Device Tree Source
*
* Copyright 2013 Freescale Semiconductor Inc.
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -38,6 +38,17 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
ifc: localbus@ffe124000 {
reg = <0xf 0xfe124000 0 0x2000>;
ranges = <0 0 0xf 0xe8000000 0x08000000
@ -77,6 +88,10 @@
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

14
arch/powerpc/boot/dts/t104xrdb.dtsi
View File

@ -33,6 +33,16 @@
*/
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
ifc: localbus@ffe124000 {
reg = <0xf 0xfe124000 0 0x2000>;
@ -69,6 +79,10 @@
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

19
arch/powerpc/boot/dts/t208xqds.dtsi
View File

@ -1,7 +1,7 @@
/*
* T2080/T2081 QDS Device Tree Source
*
* Copyright 2013 Freescale Semiconductor Inc.
* Copyright 2013 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -39,6 +39,17 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
ifc: localbus@ffe124000 {
reg = <0xf 0xfe124000 0 0x2000>;
ranges = <0 0 0xf 0xe8000000 0x08000000
@ -78,6 +89,10 @@
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
@ -137,7 +152,7 @@
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
interrupts = <0x1 0x1 0 0>;
interrupts = <0xb 0x1 0 0>;
};
};

15
arch/powerpc/boot/dts/t208xrdb.dtsi
View File

@ -39,6 +39,17 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
ifc: localbus@ffe124000 {
reg = <0xf 0xfe124000 0 0x2000>;
ranges = <0 0 0xf 0xe8000000 0x08000000
@ -79,6 +90,10 @@
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

17
arch/powerpc/boot/dts/t4240qds.dts
View File

@ -1,7 +1,7 @@
/*
* T4240QDS Device Tree Source
*
* Copyright 2012 Freescale Semiconductor Inc.
* Copyright 2012 - 2014 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@ -100,10 +100,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

15
arch/powerpc/boot/dts/t4240rdb.dts
View File

@ -69,10 +69,25 @@
device_type = "memory";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bman_fbpr: bman-fbpr {
size = <0 0x1000000>;
alignment = <0 0x1000000>;
};
};
dcsr: dcsr@f00000000 {
ranges = <0x00000000 0xf 0x00000000 0x01072000>;
};
bportals: bman-portals@ff4000000 {
ranges = <0x0 0xf 0xf4000000 0x2000000>;
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;

7
arch/powerpc/configs/corenet32_smp_defconfig
View File

@ -99,6 +99,8 @@ CONFIG_E1000E=y
CONFIG_AT803X_PHY=y
CONFIG_VITESSE_PHY=y
CONFIG_FIXED_PHY=y
CONFIG_MDIO_BUS_MUX_GPIO=y
CONFIG_MDIO_BUS_MUX_MMIOREG=y
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
@ -114,11 +116,14 @@ CONFIG_NVRAM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_FSL_SPI=y
CONFIG_SPI_FSL_ESPI=y
# CONFIG_HWMON is not set
CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_INA2XX=y
CONFIG_USB_HID=m
CONFIG_USB=y
CONFIG_USB_MON=y

15
arch/powerpc/configs/corenet64_smp_defconfig
View File

@ -12,6 +12,10 @@ CONFIG_BSD_PROCESS_ACCT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_CGROUPS=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
@ -75,6 +79,10 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=131072
CONFIG_EEPROM_LEGACY=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=y
CONFIG_ATA=y
CONFIG_SATA_FSL=y
CONFIG_SATA_SIL24=y
@ -85,6 +93,8 @@ CONFIG_FSL_XGMAC_MDIO=y
CONFIG_E1000E=y
CONFIG_VITESSE_PHY=y
CONFIG_FIXED_PHY=y
CONFIG_MDIO_BUS_MUX_GPIO=y
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
@ -99,11 +109,14 @@ CONFIG_SERIAL_8250_RSA=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MPC=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_FSL_SPI=y
CONFIG_SPI_FSL_ESPI=y
# CONFIG_HWMON is not set
CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_INA2XX=y
CONFIG_USB_HID=m
CONFIG_USB=y
CONFIG_USB_MON=y

3
arch/powerpc/configs/mpc85xx_defconfig
View File

@ -150,8 +150,7 @@ CONFIG_SPI=y
CONFIG_SPI_FSL_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_HWMON=m
CONFIG_SENSORS_LM90=m
CONFIG_SENSORS_LM90=y
CONFIG_FB=y
CONFIG_FB_FSL_DIU=y
# CONFIG_VGA_CONSOLE is not set

2
arch/powerpc/configs/mpc85xx_smp_defconfig
View File

@ -143,7 +143,7 @@ CONFIG_SPI=y
CONFIG_SPI_FSL_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_GPIO_MPC8XXX=y
# CONFIG_HWMON is not set
CONFIG_SENSORS_LM90=y
CONFIG_FB=y
CONFIG_FB_FSL_DIU=y
# CONFIG_VGA_CONSOLE is not set

1
arch/powerpc/include/asm/mpc85xx.h
View File

@ -61,6 +61,7 @@
#define SVR_T4240 0x824000
#define SVR_T4120 0x824001
#define SVR_T4160 0x824100
#define SVR_T4080 0x824102
#define SVR_C291 0x850000
#define SVR_C292 0x850020
#define SVR_C293 0x850030

3
arch/powerpc/include/asm/mpic.h
View File

@ -391,6 +391,9 @@ extern struct bus_type mpic_subsys;
#define MPIC_REGSET_STANDARD MPIC_REGSET(0) /* Original MPIC */
#define MPIC_REGSET_TSI108 MPIC_REGSET(1) /* Tsi108/109 PIC */
/* Get the version of primary MPIC */
extern u32 fsl_mpic_primary_get_version(void);
/* Allocate the controller structure and setup the linux irq descs
* for the range if interrupts passed in. No HW initialization is
* actually performed.

4
arch/powerpc/include/asm/paca.h
View File

@ -106,9 +106,9 @@ struct paca_struct {
#endif /* CONFIG_PPC_STD_MMU_64 */
#ifdef CONFIG_PPC_BOOK3E
u64 exgen[8] __attribute__((aligned(0x80)));
u64 exgen[8] __aligned(0x40);
/* Keep pgd in the same cacheline as the start of extlb */
pgd_t *pgd __attribute__((aligned(0x80))); /* Current PGD */
pgd_t *pgd __aligned(0x40); /* Current PGD */
pgd_t *kernel_pgd; /* Kernel PGD */
/* Shared by all threads of a core -- points to tcd of first thread */

1
arch/powerpc/platforms/85xx/common.c
View File

@ -40,6 +40,7 @@ static const struct of_device_id mpc85xx_common_ids[] __initconst = {
{ .compatible = "fsl,qoriq-pcie-v2.4", },
{ .compatible = "fsl,qoriq-pcie-v2.3", },
{ .compatible = "fsl,qoriq-pcie-v2.2", },
{ .compatible = "fsl,fman", },
{},
};

12
arch/powerpc/platforms/85xx/corenet_generic.c
View File

@ -87,6 +87,15 @@ static const struct of_device_id of_device_ids[] = {
{
.compatible = "simple-bus"
},
{
.compatible = "mdio-mux-gpio"
},
{
.compatible = "fsl,fpga-ngpixis"
},
{
.compatible = "fsl,fpga-qixis"
},
{
.compatible = "fsl,srio",
},
@ -108,6 +117,9 @@ static const struct of_device_id of_device_ids[] = {
{
.compatible = "fsl,qe",
},
{
.compatible = "fsl,fman",
},
/* The following two are for the Freescale hypervisor */
{
.name = "hypervisor",

4
arch/powerpc/platforms/85xx/smp.c
View File

@ -360,10 +360,10 @@ static void mpc85xx_smp_kexec_down(void *arg)
static void map_and_flush(unsigned long paddr)
{
struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
unsigned long kaddr = (unsigned long)kmap(page);
unsigned long kaddr = (unsigned long)kmap_atomic(page);
flush_dcache_range(kaddr, kaddr + PAGE_SIZE);
kunmap(page);
kunmap_atomic((void *)kaddr);
}
/**

29
arch/powerpc/sysdev/fsl_msi.c
View File

@ -162,7 +162,17 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
msg->address_lo = lower_32_bits(address);
msg->address_hi = upper_32_bits(address);
msg->data = hwirq;
/*
* MPIC version 2.0 has erratum PIC1. It causes
* that neither MSI nor MSI-X can work fine.
* This is a workaround to allow MSI-X to function
* properly. It only works for MSI-X, we prevent
* MSI on buggy chips in fsl_setup_msi_irqs().
*/
if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
msg->data = __swab32(hwirq);
else
msg->data = hwirq;
pr_debug("%s: allocated srs: %d, ibs: %d\n", __func__,
(hwirq >> msi_data->srs_shift) & MSI_SRS_MASK,
@ -180,8 +190,16 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
struct msi_msg msg;
struct fsl_msi *msi_data;
if (type == PCI_CAP_ID_MSIX)
pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
if (type == PCI_CAP_ID_MSI) {
/*
* MPIC version 2.0 has erratum PIC1. For now MSI
* could not work. So check to prevent MSI from
* being used on the board with this erratum.
*/
list_for_each_entry(msi_data, &msi_head, list)
if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
return -EINVAL;
}
/*
* If the PCI node has an fsl,msi property, then we need to use it
@ -446,6 +464,11 @@ static int fsl_of_msi_probe(struct platform_device *dev)
msi->feature = features->fsl_pic_ip;
/* For erratum PIC1 on MPIC version 2.0*/
if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) == FSL_PIC_IP_MPIC
&& (fsl_mpic_primary_get_version() == 0x0200))
msi->feature |= MSI_HW_ERRATA_ENDIAN;
/*
* Remember the phandle, so that we can match with any PCI nodes
* that have an "fsl,msi" property.

2
arch/powerpc/sysdev/fsl_msi.h
View File

@ -27,6 +27,8 @@
#define FSL_PIC_IP_IPIC 0x00000002
#define FSL_PIC_IP_VMPIC 0x00000003
#define MSI_HW_ERRATA_ENDIAN 0x00000010
struct fsl_msi_cascade_data;
struct fsl_msi {

11
arch/powerpc/sysdev/mpic.c
View File

@ -655,7 +655,6 @@ static inline struct mpic * mpic_from_irq_data(struct irq_data *d)
static inline void mpic_eoi(struct mpic *mpic)
{
mpic_cpu_write(MPIC_INFO(CPU_EOI), 0);
(void)mpic_cpu_read(MPIC_INFO(CPU_WHOAMI));
}
/*
@ -1219,6 +1218,16 @@ static u32 fsl_mpic_get_version(struct mpic *mpic)
* Exported functions
*/
u32 fsl_mpic_primary_get_version(void)
{
struct mpic *mpic = mpic_primary;
if (mpic)
return fsl_mpic_get_version(mpic);
return 0;
}
struct mpic * __init mpic_alloc(struct device_node *node,
phys_addr_t phys_addr,
unsigned int flags,

25
arch/powerpc/sysdev/qe_lib/qe_io.c
View File

@ -190,28 +190,3 @@ int par_io_of_config(struct device_node *np)
return 0;
}
EXPORT_SYMBOL(par_io_of_config);
#ifdef DEBUG
static void dump_par_io(void)
{
unsigned int i;
printk(KERN_INFO "%s: par_io=%p\n", __func__, par_io);
for (i = 0; i < num_par_io_ports; i++) {
printk(KERN_INFO " cpodr[%u]=%08x\n", i,
in_be32(&par_io[i].cpodr));
printk(KERN_INFO " cpdata[%u]=%08x\n", i,
in_be32(&par_io[i].cpdata));
printk(KERN_INFO " cpdir1[%u]=%08x\n", i,
in_be32(&par_io[i].cpdir1));
printk(KERN_INFO " cpdir2[%u]=%08x\n", i,
in_be32(&par_io[i].cpdir2));
printk(KERN_INFO " cppar1[%u]=%08x\n", i,
in_be32(&par_io[i].cppar1));
printk(KERN_INFO " cppar2[%u]=%08x\n", i,
in_be32(&par_io[i].cppar2));
}
}
EXPORT_SYMBOL(dump_par_io);
#endif /* DEBUG */