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Staging: rt3070: remove dead RT_BIG_ENDIAN code

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Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Bartlomiej Zolnierkiewicz 2009-04-26 16:05:44 +02:00 committed by Greg Kroah-Hartman
parent 5176fae43f
commit 2bc1c810c3
21 changed files with 64 additions and 2002 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/staging/rt3070/2870_main_dev.c
View File

@ -1264,9 +1264,7 @@ VOID RT28xx_UpdateBeaconToAsic(
else else
{ {
ptr = (PUCHAR)&pAd->BeaconTxWI; ptr = (PUCHAR)&pAd->BeaconTxWI;
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange(ptr, TYPE_TXWI);
#endif
if (NdisEqualMemory(pBeaconSync->BeaconTxWI[bcn_idx], &pAd->BeaconTxWI, TXWI_SIZE) == FALSE) if (NdisEqualMemory(pBeaconSync->BeaconTxWI[bcn_idx], &pAd->BeaconTxWI, TXWI_SIZE) == FALSE)
{ // If BeaconTxWI changed, we need to rewrite the TxWI for the Beacon frames. { // If BeaconTxWI changed, we need to rewrite the TxWI for the Beacon frames.
pBeaconSync->BeaconBitMap &= (~(BEACON_BITMAP_MASK & (1 << bcn_idx))); pBeaconSync->BeaconBitMap &= (~(BEACON_BITMAP_MASK & (1 << bcn_idx)));

7
drivers/staging/rt3070/action.h
View File

@ -41,17 +41,10 @@
typedef struct PACKED __HT_INFO_OCTET typedef struct PACKED __HT_INFO_OCTET
{ {
#ifdef RT_BIG_ENDIAN
UCHAR Reserved:5;
UCHAR STA_Channel_Width:1;
UCHAR Forty_MHz_Intolerant:1;
UCHAR Request:1;
#else
UCHAR Request:1; UCHAR Request:1;
UCHAR Forty_MHz_Intolerant:1; UCHAR Forty_MHz_Intolerant:1;
UCHAR STA_Channel_Width:1; UCHAR STA_Channel_Width:1;
UCHAR Reserved:5; UCHAR Reserved:5;
#endif
} HT_INFORMATION_OCTET; } HT_INFORMATION_OCTET;

10
drivers/staging/rt3070/common/2870_rtmp_init.c
View File

@ -1063,18 +1063,13 @@ PNDIS_PACKET GetPacketFromRxRing(
// skip USB frame length field // skip USB frame length field
pData += RT2870_RXDMALEN_FIELD_SIZE; pData += RT2870_RXDMALEN_FIELD_SIZE;
pRxWI = (PRXWI_STRUC)pData; pRxWI = (PRXWI_STRUC)pData;
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange(pData, TYPE_RXWI);
#endif // RT_BIG_ENDIAN //
if (pRxWI->MPDUtotalByteCount > ThisFrameLen) if (pRxWI->MPDUtotalByteCount > ThisFrameLen)
{ {
DBGPRINT(RT_DEBUG_ERROR, ("%s():pRxWIMPDUtotalByteCount(%d) large than RxDMALen(%ld)\n", DBGPRINT(RT_DEBUG_ERROR, ("%s():pRxWIMPDUtotalByteCount(%d) large than RxDMALen(%ld)\n",
__func__, pRxWI->MPDUtotalByteCount, ThisFrameLen)); __func__, pRxWI->MPDUtotalByteCount, ThisFrameLen));
goto label_null; goto label_null;
} }
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange(pData, TYPE_RXWI);
#endif // RT_BIG_ENDIAN //
// allocate a rx packet // allocate a rx packet
pSkb = dev_alloc_skb(ThisFrameLen); pSkb = dev_alloc_skb(ThisFrameLen);
@ -1091,9 +1086,6 @@ PNDIS_PACKET GetPacketFromRxRing(
// copy RxD // copy RxD
*pSaveRxD = *(PRXINFO_STRUC)(pData + ThisFrameLen); *pSaveRxD = *(PRXINFO_STRUC)(pData + ThisFrameLen);
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pSaveRxD, TYPE_RXINFO);
#endif // RT_BIG_ENDIAN //
// update next packet read position. // update next packet read position.
pAd->ReadPosition += (ThisFrameLen + RT2870_RXDMALEN_FIELD_SIZE + RXINFO_SIZE); // 8 for (RT2870_RXDMALEN_FIELD_SIZE + sizeof(RXINFO_STRUC)) pAd->ReadPosition += (ThisFrameLen + RT2870_RXDMALEN_FIELD_SIZE + RXINFO_SIZE); // 8 for (RT2870_RXDMALEN_FIELD_SIZE + sizeof(RXINFO_STRUC))

8
drivers/staging/rt3070/common/cmm_data.c
View File

@ -495,10 +495,6 @@ NDIS_STATUS MlmeHardTransmitMgmtRing(
return (NDIS_STATUS_FAILURE); return (NDIS_STATUS_FAILURE);
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pHeader_802_11, DIR_WRITE, FALSE);
#endif
// //
// fill scatter-and-gather buffer list into TXD. Internally created NDIS PACKET // fill scatter-and-gather buffer list into TXD. Internally created NDIS PACKET
// should always has only one ohysical buffer, and the whole frame size equals // should always has only one ohysical buffer, and the whole frame size equals
@ -526,10 +522,6 @@ NDIS_STATUS MlmeHardTransmitMgmtRing(
IFS_BACKOFF, FALSE, &pMacEntry->MaxHTPhyMode); IFS_BACKOFF, FALSE, &pMacEntry->MaxHTPhyMode);
} }
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange((PUCHAR)pFirstTxWI, TYPE_TXWI);
#endif
// Now do hardware-depened kick out. // Now do hardware-depened kick out.
HAL_KickOutMgmtTx(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen); HAL_KickOutMgmtTx(pAd, QueIdx, pPacket, pSrcBufVA, SrcBufLen);

16
drivers/staging/rt3070/common/cmm_data_2870.c
View File

@ -189,9 +189,6 @@ USHORT RtmpUSB_WriteFragTxResource(
} }
NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, TXINFO_SIZE + TXWI_SIZE + hwHdrLen); NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)(pWirelessPacket + TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
#endif // RT_BIG_ENDIAN //
pWirelessPacket += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen); pWirelessPacket += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
pHTTXContext->CurWriteRealPos += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen); pHTTXContext->CurWriteRealPos += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
@ -307,9 +304,6 @@ USHORT RtmpUSB_WriteSingleTxResource(
bTxQLastRound = TRUE; bTxQLastRound = TRUE;
} }
NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, TXINFO_SIZE + TXWI_SIZE + hwHdrLen); NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)(pWirelessPacket + TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
#endif // RT_BIG_ENDIAN //
pWirelessPacket += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen); pWirelessPacket += (TXINFO_SIZE + TXWI_SIZE + hwHdrLen);
// We unlock it here to prevent the first 8 bytes maybe over-writed issue. // We unlock it here to prevent the first 8 bytes maybe over-writed issue.
@ -421,9 +415,6 @@ USHORT RtmpUSB_WriteMultiTxResource(
// Copy it. // Copy it.
NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, pTxBlk->Priv); NdisMoveMemory(pWirelessPacket, pTxBlk->HeaderBuf, pTxBlk->Priv);
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)(pWirelessPacket+ TXINFO_SIZE + TXWI_SIZE), DIR_WRITE, FALSE);
#endif // RT_BIG_ENDIAN //
pHTTXContext->CurWriteRealPos += pTxBlk->Priv; pHTTXContext->CurWriteRealPos += pTxBlk->Priv;
pWirelessPacket += pTxBlk->Priv; pWirelessPacket += pTxBlk->Priv;
} }
@ -691,14 +682,7 @@ VOID RtmpUSBNullFrameKickOut(
pTxWI = (PTXWI_STRUC)&pWirelessPkt[TXINFO_SIZE]; pTxWI = (PTXWI_STRUC)&pWirelessPkt[TXINFO_SIZE];
RTMPWriteTxWI(pAd, pTxWI, FALSE, FALSE, FALSE, FALSE, TRUE, FALSE, 0, BSSID_WCID, (sizeof(HEADER_802_11)), RTMPWriteTxWI(pAd, pTxWI, FALSE, FALSE, FALSE, FALSE, TRUE, FALSE, 0, BSSID_WCID, (sizeof(HEADER_802_11)),
0, 0, (UCHAR)pAd->CommonCfg.MlmeTransmit.field.MCS, IFS_HTTXOP, FALSE, &pAd->CommonCfg.MlmeTransmit); 0, 0, (UCHAR)pAd->CommonCfg.MlmeTransmit.field.MCS, IFS_HTTXOP, FALSE, &pAd->CommonCfg.MlmeTransmit);
#ifdef RT_BIG_ENDIAN
RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
#endif // RT_BIG_ENDIAN //
RTMPMoveMemory(&pWirelessPkt[TXWI_SIZE+TXINFO_SIZE], &pAd->NullFrame, sizeof(HEADER_802_11)); RTMPMoveMemory(&pWirelessPkt[TXWI_SIZE+TXINFO_SIZE], &pAd->NullFrame, sizeof(HEADER_802_11));
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)&pWirelessPkt[TXINFO_SIZE + TXWI_SIZE], DIR_WRITE, FALSE);
#endif // RT_BIG_ENDIAN //
pAd->NullContext.BulkOutSize = TXINFO_SIZE + TXWI_SIZE + sizeof(pAd->NullFrame) + 4; pAd->NullContext.BulkOutSize = TXINFO_SIZE + TXWI_SIZE + sizeof(pAd->NullFrame) + 4;
// Fill out frame length information for global Bulk out arbitor // Fill out frame length information for global Bulk out arbitor

27
drivers/staging/rt3070/common/cmm_sync.c
View File

@ -591,52 +591,27 @@ VOID ScanNextChannel(
ULONG Tmp; ULONG Tmp;
UCHAR HtLen; UCHAR HtLen;
UCHAR BROADCOM[4] = {0x0, 0x90, 0x4c, 0x33}; UCHAR BROADCOM[4] = {0x0, 0x90, 0x4c, 0x33};
#ifdef RT_BIG_ENDIAN
HT_CAPABILITY_IE HtCapabilityTmp;
#endif
if (pAd->bBroadComHT == TRUE) if (pAd->bBroadComHT == TRUE)
{ {
HtLen = pAd->MlmeAux.HtCapabilityLen + 4; HtLen = pAd->MlmeAux.HtCapabilityLen + 4;
#ifdef RT_BIG_ENDIAN
NdisMoveMemory(&HtCapabilityTmp, &pAd->MlmeAux.HtCapability, SIZE_HT_CAP_IE);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &WpaIe,
1, &HtLen,
4, &BROADCOM[0],
pAd->MlmeAux.HtCapabilityLen, &HtCapabilityTmp,
END_OF_ARGS);
#else
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp, MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &WpaIe, 1, &WpaIe,
1, &HtLen, 1, &HtLen,
4, &BROADCOM[0], 4, &BROADCOM[0],
pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability, pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability,
END_OF_ARGS); END_OF_ARGS);
#endif // RT_BIG_ENDIAN //
} }
else else
{ {
HtLen = pAd->MlmeAux.HtCapabilityLen; HtLen = pAd->MlmeAux.HtCapabilityLen;
#ifdef RT_BIG_ENDIAN
NdisMoveMemory(&HtCapabilityTmp, &pAd->CommonCfg.HtCapability, SIZE_HT_CAP_IE);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &HtCapIe,
1, &HtLen,
HtLen, &HtCapabilityTmp,
END_OF_ARGS);
#else
MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp, MakeOutgoingFrame(pOutBuffer + FrameLen, &Tmp,
1, &HtCapIe, 1, &HtCapIe,
1, &HtLen, 1, &HtLen,
HtLen, &pAd->CommonCfg.HtCapability, HtLen, &pAd->CommonCfg.HtCapability,
END_OF_ARGS); END_OF_ARGS);
#endif // RT_BIG_ENDIAN //
} }
FrameLen += Tmp; FrameLen += Tmp;
} }

8
drivers/staging/rt3070/common/eeprom.c
View File

@ -361,11 +361,7 @@ UCHAR eFuseReadRegisters(
//Return 2-bytes //Return 2-bytes
//The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC. //The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.
//For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes. //For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.
#ifdef RT_BIG_ENDIAN
data = data << (8*((Offset & 0x3)^0x2));
#else
data = data >> (8*(Offset & 0x3)); data = data >> (8*(Offset & 0x3));
#endif
NdisMoveMemory(pData, &data, Length); NdisMoveMemory(pData, &data, Length);
} }
@ -438,11 +434,7 @@ VOID eFusePhysicalReadRegisters(
RTMP_IO_READ32(pAd, efuseDataOffset, &data); RTMP_IO_READ32(pAd, efuseDataOffset, &data);
#ifdef RT_BIG_ENDIAN
data = data << (8*((Offset & 0x3)^0x2));
#else
data = data >> (8*(Offset & 0x3)); data = data >> (8*(Offset & 0x3));
#endif
NdisMoveMemory(pData, &data, Length); NdisMoveMemory(pData, &data, Length);

12
drivers/staging/rt3070/common/md5.c
View File

@ -131,19 +131,7 @@ void hmac_md5(u8 *key, size_t key_len, u8 *data, size_t data_len, u8 *mac)
MD5Final(mac, &context); /* finish up 2nd pass */ MD5Final(mac, &context); /* finish up 2nd pass */
} }
#ifndef RT_BIG_ENDIAN
#define byteReverse(buf, len) /* Nothing */ #define byteReverse(buf, len) /* Nothing */
#else
void byteReverse(unsigned char *buf, unsigned longs);
void byteReverse(unsigned char *buf, unsigned longs)
{
do {
*(UINT32 *)buf = SWAP32(*(UINT32 *)buf);
buf += 4;
} while (--longs);
}
#endif
/* ========================== MD5 implementation =========================== */ /* ========================== MD5 implementation =========================== */
// four base functions for MD5 // four base functions for MD5

21
drivers/staging/rt3070/common/rtmp_tkip.c
View File

@ -199,15 +199,9 @@ typedef struct PACKED _IV_CONTROL_
{ {
struct PACKED struct PACKED
{ {
#ifdef RT_BIG_ENDIAN
UCHAR KeyID:2;
UCHAR ExtIV:1;
UCHAR Rsvd:5;
#else
UCHAR Rsvd:5; UCHAR Rsvd:5;
UCHAR ExtIV:1; UCHAR ExtIV:1;
UCHAR KeyID:2; UCHAR KeyID:2;
#endif
} field; } field;
UCHAR Byte; UCHAR Byte;
} CONTROL; } CONTROL;
@ -1117,10 +1111,6 @@ BOOLEAN RTMPSoftDecryptTKIP(
UCHAR MIC[8]; UCHAR MIC[8];
UCHAR TrailMIC[8]; UCHAR TrailMIC[8];
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
fc0 = *pData; fc0 = *pData;
fc1 = *(pData + 1); fc1 = *(pData + 1);
@ -1228,9 +1218,6 @@ BOOLEAN RTMPSoftDecryptTKIP(
return (FALSE); return (FALSE);
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
//DBGPRINT(RT_DEBUG_TRACE, "RTMPSoftDecryptTKIP Decript done!!\n"); //DBGPRINT(RT_DEBUG_TRACE, "RTMPSoftDecryptTKIP Decript done!!\n");
return TRUE; return TRUE;
} }
@ -1271,10 +1258,6 @@ BOOLEAN RTMPSoftDecryptAES(
UCHAR MIC[8]; UCHAR MIC[8];
UCHAR TrailMIC[8]; UCHAR TrailMIC[8];
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
fc0 = *pData; fc0 = *pData;
fc1 = *(pData + 1); fc1 = *(pData + 1);
@ -1443,10 +1426,6 @@ BOOLEAN RTMPSoftDecryptAES(
return FALSE; return FALSE;
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pData, DIR_READ, FALSE);
#endif
return TRUE; return TRUE;
} }

29
drivers/staging/rt3070/common/rtusb_bulk.c
View File

@ -375,31 +375,14 @@ VOID RTUSBBulkOutDataPacket(
bTxQLastRound = TRUE; bTxQLastRound = TRUE;
pHTTXContext->ENextBulkOutPosition = 8; pHTTXContext->ENextBulkOutPosition = 8;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxInfo, TYPE_TXINFO);
RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
#endif // RT_BIG_ENDIAN //
break; break;
} }
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pTxInfo, TYPE_TXINFO);
RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
#endif // RT_BIG_ENDIAN //
}while (TRUE); }while (TRUE);
// adjust the pTxInfo->USBDMANextVLD value of last pTxInfo. // adjust the pTxInfo->USBDMANextVLD value of last pTxInfo.
if (pLastTxInfo) if (pLastTxInfo)
{ {
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pLastTxInfo, TYPE_TXINFO);
#endif // RT_BIG_ENDIAN //
pLastTxInfo->USBDMANextVLD = 0; pLastTxInfo->USBDMANextVLD = 0;
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pLastTxInfo, TYPE_TXINFO);
#endif // RT_BIG_ENDIAN //
} }
/* /*
@ -554,10 +537,6 @@ VOID RTUSBBulkOutNullFrame(
// Clear Null frame bulk flag // Clear Null frame bulk flag
RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NULL); RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_DATA_NULL);
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pNullContext->TransferBuffer, TYPE_TXINFO);
#endif // RT_BIG_ENDIAN //
// Init Tx context descriptor // Init Tx context descriptor
RTUSBInitTxDesc(pAd, pNullContext, 0, (usb_complete_t)RTUSBBulkOutNullFrameComplete); RTUSBInitTxDesc(pAd, pNullContext, 0, (usb_complete_t)RTUSBBulkOutNullFrameComplete);
@ -652,10 +631,6 @@ VOID RTUSBBulkOutMLMEPacket(
// Clear MLME bulk flag // Clear MLME bulk flag
RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME); RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_MLME);
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pMLMEContext->TransferBuffer, TYPE_TXINFO);
#endif // RT_BIG_ENDIAN //
// Init Tx context descriptor // Init Tx context descriptor
RTUSBInitTxDesc(pAd, pMLMEContext, MGMTPIPEIDX, (usb_complete_t)RTUSBBulkOutMLMEPacketComplete); RTUSBInitTxDesc(pAd, pMLMEContext, MGMTPIPEIDX, (usb_complete_t)RTUSBBulkOutMLMEPacketComplete);
@ -738,10 +713,6 @@ VOID RTUSBBulkOutPsPoll(
// Clear PS-Poll bulk flag // Clear PS-Poll bulk flag
RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL); RTUSB_CLEAR_BULK_FLAG(pAd, fRTUSB_BULK_OUT_PSPOLL);
#ifdef RT_BIG_ENDIAN
RTMPDescriptorEndianChange((PUCHAR)pPsPollContext->TransferBuffer, TYPE_TXINFO);
#endif // RT_BIG_ENDIAN //
// Init Tx context descriptor // Init Tx context descriptor
RTUSBInitTxDesc(pAd, pPsPollContext, MGMTPIPEIDX, (usb_complete_t)RTUSBBulkOutPsPollComplete); RTUSBInitTxDesc(pAd, pPsPollContext, MGMTPIPEIDX, (usb_complete_t)RTUSBBulkOutPsPollComplete);

260
drivers/staging/rt3070/mlme.h
View File

@ -209,22 +209,6 @@ if (((__pEntry)) != NULL) \
// //
// HT Capability INFO field in HT Cap IE . // HT Capability INFO field in HT Cap IE .
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT LSIGTxopProSup:1;
USHORT Forty_Mhz_Intolerant:1;
USHORT PSMP:1;
USHORT CCKmodein40:1;
USHORT AMsduSize:1;
USHORT DelayedBA:1; //rt2860c not support
USHORT RxSTBC:2;
USHORT TxSTBC:1;
USHORT ShortGIfor40:1; //for40MHz
USHORT ShortGIfor20:1;
USHORT GF:1; //green field
USHORT MimoPs:2;//momi power safe
USHORT ChannelWidth:1;
USHORT AdvCoding:1;
#else
USHORT AdvCoding:1; USHORT AdvCoding:1;
USHORT ChannelWidth:1; USHORT ChannelWidth:1;
USHORT MimoPs:2;//momi power safe USHORT MimoPs:2;//momi power safe
@ -239,53 +223,29 @@ typedef struct PACKED {
USHORT PSMP:1; USHORT PSMP:1;
USHORT Forty_Mhz_Intolerant:1; USHORT Forty_Mhz_Intolerant:1;
USHORT LSIGTxopProSup:1; USHORT LSIGTxopProSup:1;
#endif /* !RT_BIG_ENDIAN */
} HT_CAP_INFO, *PHT_CAP_INFO; } HT_CAP_INFO, *PHT_CAP_INFO;
// HT Capability INFO field in HT Cap IE . // HT Capability INFO field in HT Cap IE .
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
UCHAR rsv:3;//momi power safe
UCHAR MpduDensity:3;
UCHAR MaxRAmpduFactor:2;
#else
UCHAR MaxRAmpduFactor:2; UCHAR MaxRAmpduFactor:2;
UCHAR MpduDensity:3; UCHAR MpduDensity:3;
UCHAR rsv:3;//momi power safe UCHAR rsv:3;//momi power safe
#endif /* !RT_BIG_ENDIAN */
} HT_CAP_PARM, *PHT_CAP_PARM; } HT_CAP_PARM, *PHT_CAP_PARM;
// HT Capability INFO field in HT Cap IE . // HT Capability INFO field in HT Cap IE .
typedef struct PACKED { typedef struct PACKED {
UCHAR MCSSet[10]; UCHAR MCSSet[10];
UCHAR SupRate[2]; // unit : 1Mbps UCHAR SupRate[2]; // unit : 1Mbps
#ifdef RT_BIG_ENDIAN
UCHAR rsv:3;
UCHAR MpduDensity:1;
UCHAR TxStream:2;
UCHAR TxRxNotEqual:1;
UCHAR TxMCSSetDefined:1;
#else
UCHAR TxMCSSetDefined:1; UCHAR TxMCSSetDefined:1;
UCHAR TxRxNotEqual:1; UCHAR TxRxNotEqual:1;
UCHAR TxStream:2; UCHAR TxStream:2;
UCHAR MpduDensity:1; UCHAR MpduDensity:1;
UCHAR rsv:3; UCHAR rsv:3;
#endif // RT_BIG_ENDIAN //
UCHAR rsv3[3]; UCHAR rsv3[3];
} HT_MCS_SET, *PHT_MCS_SET; } HT_MCS_SET, *PHT_MCS_SET;
// HT Capability INFO field in HT Cap IE . // HT Capability INFO field in HT Cap IE .
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT rsv2:4;
USHORT RDGSupport:1; //reverse Direction Grant support
USHORT PlusHTC:1; //+HTC control field support
USHORT MCSFeedback:2; //0:no MCS feedback, 2:unsolicited MCS feedback, 3:Full MCS feedback, 1:rsv.
USHORT rsv:5;//momi power safe
USHORT TranTime:2;
USHORT Pco:1;
#else
USHORT Pco:1; USHORT Pco:1;
USHORT TranTime:2; USHORT TranTime:2;
USHORT rsv:5;//momi power safe USHORT rsv:5;//momi power safe
@ -293,33 +253,10 @@ typedef struct PACKED {
USHORT PlusHTC:1; //+HTC control field support USHORT PlusHTC:1; //+HTC control field support
USHORT RDGSupport:1; //reverse Direction Grant support USHORT RDGSupport:1; //reverse Direction Grant support
USHORT rsv2:4; USHORT rsv2:4;
#endif /* RT_BIG_ENDIAN */
} EXT_HT_CAP_INFO, *PEXT_HT_CAP_INFO; } EXT_HT_CAP_INFO, *PEXT_HT_CAP_INFO;
// HT Beamforming field in HT Cap IE . // HT Beamforming field in HT Cap IE .
typedef struct PACKED _HT_BF_CAP{ typedef struct PACKED _HT_BF_CAP{
#ifdef RT_BIG_ENDIAN
ULONG rsv:3;
ULONG ChanEstimation:2;
ULONG CSIRowBFSup:2;
ULONG ComSteerBFAntSup:2;
ULONG NoComSteerBFAntSup:2;
ULONG CSIBFAntSup:2;
ULONG MinGrouping:2;
ULONG ExpComBF:2;
ULONG ExpNoComBF:2;
ULONG ExpCSIFbk:2;
ULONG ExpComSteerCapable:1;
ULONG ExpNoComSteerCapable:1;
ULONG ExpCSICapable:1;
ULONG Calibration:2;
ULONG ImpTxBFCapable:1;
ULONG TxNDPCapable:1;
ULONG RxNDPCapable:1;
ULONG TxSoundCapable:1;
ULONG RxSoundCapable:1;
ULONG TxBFRecCapable:1;
#else
ULONG TxBFRecCapable:1; ULONG TxBFRecCapable:1;
ULONG RxSoundCapable:1; ULONG RxSoundCapable:1;
ULONG TxSoundCapable:1; ULONG TxSoundCapable:1;
@ -340,21 +277,10 @@ typedef struct PACKED _HT_BF_CAP{
ULONG CSIRowBFSup:2; ULONG CSIRowBFSup:2;
ULONG ChanEstimation:2; ULONG ChanEstimation:2;
ULONG rsv:3; ULONG rsv:3;
#endif // RT_BIG_ENDIAN //
} HT_BF_CAP, *PHT_BF_CAP; } HT_BF_CAP, *PHT_BF_CAP;
// HT antenna selection field in HT Cap IE . // HT antenna selection field in HT Cap IE .
typedef struct PACKED _HT_AS_CAP{ typedef struct PACKED _HT_AS_CAP{
#ifdef RT_BIG_ENDIAN
UCHAR rsv:1;
UCHAR TxSoundPPDU:1;
UCHAR RxASel:1;
UCHAR AntIndFbk:1;
UCHAR ExpCSIFbk:1;
UCHAR AntIndFbkTxASEL:1;
UCHAR ExpCSIFbkTxASEL:1;
UCHAR AntSelect:1;
#else
UCHAR AntSelect:1; UCHAR AntSelect:1;
UCHAR ExpCSIFbkTxASEL:1; UCHAR ExpCSIFbkTxASEL:1;
UCHAR AntIndFbkTxASEL:1; UCHAR AntIndFbkTxASEL:1;
@ -363,7 +289,6 @@ typedef struct PACKED _HT_AS_CAP{
UCHAR RxASel:1; UCHAR RxASel:1;
UCHAR TxSoundPPDU:1; UCHAR TxSoundPPDU:1;
UCHAR rsv:1; UCHAR rsv:1;
#endif // RT_BIG_ENDIAN //
} HT_AS_CAP, *PHT_AS_CAP; } HT_AS_CAP, *PHT_AS_CAP;
// Draft 1.0 set IE length 26, but is extensible.. // Draft 1.0 set IE length 26, but is extensible..
@ -407,17 +332,10 @@ typedef struct PACKED _OVERLAP_BSS_SCAN_IE{
// 7.3.2.56. 20/40 Coexistence element used in Element ID = 72 = IE_2040_BSS_COEXIST // 7.3.2.56. 20/40 Coexistence element used in Element ID = 72 = IE_2040_BSS_COEXIST
typedef union PACKED _BSS_2040_COEXIST_IE{ typedef union PACKED _BSS_2040_COEXIST_IE{
struct PACKED { struct PACKED {
#ifdef RT_BIG_ENDIAN
UCHAR rsv:5;
UCHAR BSS20WidthReq:1;
UCHAR Intolerant40:1;
UCHAR InfoReq:1;
#else
UCHAR InfoReq:1; UCHAR InfoReq:1;
UCHAR Intolerant40:1; // Inter-BSS. set 1 when prohibits a receiving BSS from operating as a 20/40 Mhz BSS. UCHAR Intolerant40:1; // Inter-BSS. set 1 when prohibits a receiving BSS from operating as a 20/40 Mhz BSS.
UCHAR BSS20WidthReq:1; // Intra-BSS set 1 when prohibits a receiving AP from operating its BSS as a 20/40MHz BSS. UCHAR BSS20WidthReq:1; // Intra-BSS set 1 when prohibits a receiving AP from operating its BSS as a 20/40MHz BSS.
UCHAR rsv:5; UCHAR rsv:5;
#endif // RT_BIG_ENDIAN //
} field; } field;
UCHAR word; UCHAR word;
} BSS_2040_COEXIST_IE, *PBSS_2040_COEXIST_IE; } BSS_2040_COEXIST_IE, *PBSS_2040_COEXIST_IE;
@ -443,17 +361,10 @@ typedef struct _TRIGGER_EVENT_TAB{
// 7.3.27 20/40 Bss Coexistence Mgmt capability used in extended capabilities information IE( ID = 127 = IE_EXT_CAPABILITY). // 7.3.27 20/40 Bss Coexistence Mgmt capability used in extended capabilities information IE( ID = 127 = IE_EXT_CAPABILITY).
// This is the first octet and was defined in 802.11n D3.03 and 802.11yD9.0 // This is the first octet and was defined in 802.11n D3.03 and 802.11yD9.0
typedef struct PACKED _EXT_CAP_INFO_ELEMENT{ typedef struct PACKED _EXT_CAP_INFO_ELEMENT{
#ifdef RT_BIG_ENDIAN
UCHAR rsv2:5;
UCHAR ExtendChannelSwitch:1;
UCHAR rsv:1;
UCHAR BssCoexistMgmtSupport:1;
#else
UCHAR BssCoexistMgmtSupport:1; UCHAR BssCoexistMgmtSupport:1;
UCHAR rsv:1; UCHAR rsv:1;
UCHAR ExtendChannelSwitch:1; UCHAR ExtendChannelSwitch:1;
UCHAR rsv2:5; UCHAR rsv2:5;
#endif // RT_BIG_ENDIAN //
}EXT_CAP_INFO_ELEMENT, *PEXT_CAP_INFO_ELEMENT; }EXT_CAP_INFO_ELEMENT, *PEXT_CAP_INFO_ELEMENT;
@ -499,18 +410,6 @@ typedef struct {
//This structure substracts ralink supports from all 802.11n-related features. //This structure substracts ralink supports from all 802.11n-related features.
//Features not listed here but contained in 802.11n spec are not supported in rt2860. //Features not listed here but contained in 802.11n spec are not supported in rt2860.
typedef struct { typedef struct {
#ifdef RT_BIG_ENDIAN
USHORT rsv:5;
USHORT AmsduSize:1; // Max receiving A-MSDU size
USHORT AmsduEnable:1; // Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n
USHORT RxSTBC:2; // 2 bits
USHORT TxSTBC:1;
USHORT ShortGIfor40:1; //for40MHz
USHORT ShortGIfor20:1;
USHORT GF:1; //green field
USHORT MimoPs:2;//mimo power safe MMPS_
USHORT ChannelWidth:1;
#else
USHORT ChannelWidth:1; USHORT ChannelWidth:1;
USHORT MimoPs:2;//mimo power safe MMPS_ USHORT MimoPs:2;//mimo power safe MMPS_
USHORT GF:1; //green field USHORT GF:1; //green field
@ -521,34 +420,18 @@ typedef struct {
USHORT AmsduEnable:1; // Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n USHORT AmsduEnable:1; // Enable to transmit A-MSDU. Suggest disable. We should use A-MPDU to gain best benifit of 802.11n
USHORT AmsduSize:1; // Max receiving A-MSDU size USHORT AmsduSize:1; // Max receiving A-MSDU size
USHORT rsv:5; USHORT rsv:5;
#endif
//Substract from Addiont HT INFO IE //Substract from Addiont HT INFO IE
#ifdef RT_BIG_ENDIAN
UCHAR RecomWidth:1;
UCHAR ExtChanOffset:2; // Please not the difference with following UCHAR NewExtChannelOffset; from 802.11n
UCHAR MpduDensity:3;
UCHAR MaxRAmpduFactor:2;
#else
UCHAR MaxRAmpduFactor:2; UCHAR MaxRAmpduFactor:2;
UCHAR MpduDensity:3; UCHAR MpduDensity:3;
UCHAR ExtChanOffset:2; // Please not the difference with following UCHAR NewExtChannelOffset; from 802.11n UCHAR ExtChanOffset:2; // Please not the difference with following UCHAR NewExtChannelOffset; from 802.11n
UCHAR RecomWidth:1; UCHAR RecomWidth:1;
#endif
#ifdef RT_BIG_ENDIAN
USHORT rsv2:11;
USHORT OBSS_NonHTExist:1;
USHORT rsv3:1;
USHORT NonGfPresent:1;
USHORT OperaionMode:2;
#else
USHORT OperaionMode:2; USHORT OperaionMode:2;
USHORT NonGfPresent:1; USHORT NonGfPresent:1;
USHORT rsv3:1; USHORT rsv3:1;
USHORT OBSS_NonHTExist:1; USHORT OBSS_NonHTExist:1;
USHORT rsv2:11; USHORT rsv2:11;
#endif
// New Extension Channel Offset IE // New Extension Channel Offset IE
UCHAR NewExtChannelOffset; UCHAR NewExtChannelOffset;
@ -558,50 +441,24 @@ typedef struct {
// field in Addtional HT Information IE . // field in Addtional HT Information IE .
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
UCHAR SerInterGranu:3;
UCHAR S_PSMPSup:1;
UCHAR RifsMode:1;
UCHAR RecomWidth:1;
UCHAR ExtChanOffset:2;
#else
UCHAR ExtChanOffset:2; UCHAR ExtChanOffset:2;
UCHAR RecomWidth:1; UCHAR RecomWidth:1;
UCHAR RifsMode:1; UCHAR RifsMode:1;
UCHAR S_PSMPSup:1; //Indicate support for scheduled PSMP UCHAR S_PSMPSup:1; //Indicate support for scheduled PSMP
UCHAR SerInterGranu:3; //service interval granularity UCHAR SerInterGranu:3; //service interval granularity
#endif
} ADD_HTINFO, *PADD_HTINFO; } ADD_HTINFO, *PADD_HTINFO;
typedef struct PACKED{ typedef struct PACKED{
#ifdef RT_BIG_ENDIAN
USHORT rsv2:11;
USHORT OBSS_NonHTExist:1;
USHORT rsv:1;
USHORT NonGfPresent:1;
USHORT OperaionMode:2;
#else
USHORT OperaionMode:2; USHORT OperaionMode:2;
USHORT NonGfPresent:1; USHORT NonGfPresent:1;
USHORT rsv:1; USHORT rsv:1;
USHORT OBSS_NonHTExist:1; USHORT OBSS_NonHTExist:1;
USHORT rsv2:11; USHORT rsv2:11;
#endif
} ADD_HTINFO2, *PADD_HTINFO2; } ADD_HTINFO2, *PADD_HTINFO2;
// TODO: Need sync with spec about the definition of StbcMcs. In Draft 3.03, it's reserved. // TODO: Need sync with spec about the definition of StbcMcs. In Draft 3.03, it's reserved.
typedef struct PACKED{ typedef struct PACKED{
#ifdef RT_BIG_ENDIAN
USHORT rsv:4;
USHORT PcoPhase:1;
USHORT PcoActive:1;
USHORT LsigTxopProt:1;
USHORT STBCBeacon:1;
USHORT DualCTSProtect:1;
USHORT DualBeacon:1;
USHORT StbcMcs:6;
#else
USHORT StbcMcs:6; USHORT StbcMcs:6;
USHORT DualBeacon:1; USHORT DualBeacon:1;
USHORT DualCTSProtect:1; USHORT DualCTSProtect:1;
@ -610,7 +467,6 @@ typedef struct PACKED{
USHORT PcoActive:1; USHORT PcoActive:1;
USHORT PcoPhase:1; USHORT PcoPhase:1;
USHORT rsv:4; USHORT rsv:4;
#endif // RT_BIG_ENDIAN //
} ADD_HTINFO3, *PADD_HTINFO3; } ADD_HTINFO3, *PADD_HTINFO3;
#define SIZE_ADD_HT_INFO_IE 22 #define SIZE_ADD_HT_INFO_IE 22
@ -629,22 +485,6 @@ typedef struct PACKED{
// 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1. // 4-byte HTC field. maybe included in any frame except non-QOS data frame. The Order bit must set 1.
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
UINT32 RDG:1; //RDG / More PPDU
UINT32 ACConstraint:1; //feedback request
UINT32 rsv:5; //calibration sequence
UINT32 ZLFAnnouce:1; // ZLF announcement
UINT32 CSISTEERING:2; //CSI/ STEERING
UINT32 FBKReq:2; //feedback request
UINT32 CalSeq:2; //calibration sequence
UINT32 CalPos:2; // calibration position
UINT32 MFBorASC:7; //Link adaptation feedback containing recommended MCS. 0x7f for no feedback or not available
UINT32 MFS:3; //SET to the received value of MRS. 0x111 for unsolicited MFB.
UINT32 MRSorASI:3; // MRQ Sequence identifier. unchanged during entire procedure. 0x000-0x110.
UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback
UINT32 TRQ:1; //sounding request
UINT32 MA:1; //management action payload exist in (QoS Null+HTC)
#else
UINT32 MA:1; //management action payload exist in (QoS Null+HTC) UINT32 MA:1; //management action payload exist in (QoS Null+HTC)
UINT32 TRQ:1; //sounding request UINT32 TRQ:1; //sounding request
UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback UINT32 MRQ:1; //MCS feedback. Request for a MCS feedback
@ -659,41 +499,19 @@ typedef struct PACKED {
UINT32 rsv:5; //calibration sequence UINT32 rsv:5; //calibration sequence
UINT32 ACConstraint:1; //feedback request UINT32 ACConstraint:1; //feedback request
UINT32 RDG:1; //RDG / More PPDU UINT32 RDG:1; //RDG / More PPDU
#endif /* !RT_BIG_ENDIAN */
} HT_CONTROL, *PHT_CONTROL; } HT_CONTROL, *PHT_CONTROL;
// 2-byte QOS CONTROL field // 2-byte QOS CONTROL field
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT Txop_QueueSize:8;
USHORT AMsduPresent:1;
USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA
USHORT EOSP:1;
USHORT TID:4;
#else
USHORT TID:4; USHORT TID:4;
USHORT EOSP:1; USHORT EOSP:1;
USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA USHORT AckPolicy:2; //0: normal ACK 1:No ACK 2:scheduled under MTBA/PSMP 3: BA
USHORT AMsduPresent:1; USHORT AMsduPresent:1;
USHORT Txop_QueueSize:8; USHORT Txop_QueueSize:8;
#endif /* !RT_BIG_ENDIAN */
} QOS_CONTROL, *PQOS_CONTROL; } QOS_CONTROL, *PQOS_CONTROL;
// 2-byte Frame control field // 2-byte Frame control field
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT Order:1; // Strict order expected
USHORT Wep:1; // Wep data
USHORT MoreData:1; // More data bit
USHORT PwrMgmt:1; // Power management bit
USHORT Retry:1; // Retry status bit
USHORT MoreFrag:1; // More fragment bit
USHORT FrDs:1; // From DS indication
USHORT ToDs:1; // To DS indication
USHORT SubType:4; // MSDU subtype
USHORT Type:2; // MSDU type
USHORT Ver:2; // Protocol version
#else
USHORT Ver:2; // Protocol version USHORT Ver:2; // Protocol version
USHORT Type:2; // MSDU type USHORT Type:2; // MSDU type
USHORT SubType:4; // MSDU subtype USHORT SubType:4; // MSDU subtype
@ -705,7 +523,6 @@ typedef struct PACKED {
USHORT MoreData:1; // More data bit USHORT MoreData:1; // More data bit
USHORT Wep:1; // Wep data USHORT Wep:1; // Wep data
USHORT Order:1; // Strict order expected USHORT Order:1; // Strict order expected
#endif /* !RT_BIG_ENDIAN */
} FRAME_CONTROL, *PFRAME_CONTROL; } FRAME_CONTROL, *PFRAME_CONTROL;
typedef struct PACKED _HEADER_802_11 { typedef struct PACKED _HEADER_802_11 {
@ -714,13 +531,8 @@ typedef struct PACKED _HEADER_802_11 {
UCHAR Addr1[MAC_ADDR_LEN]; UCHAR Addr1[MAC_ADDR_LEN];
UCHAR Addr2[MAC_ADDR_LEN]; UCHAR Addr2[MAC_ADDR_LEN];
UCHAR Addr3[MAC_ADDR_LEN]; UCHAR Addr3[MAC_ADDR_LEN];
#ifdef RT_BIG_ENDIAN
USHORT Sequence:12;
USHORT Frag:4;
#else
USHORT Frag:4; USHORT Frag:4;
USHORT Sequence:12; USHORT Sequence:12;
#endif /* !RT_BIG_ENDIAN */
UCHAR Octet[0]; UCHAR Octet[0];
} HEADER_802_11, *PHEADER_802_11; } HEADER_802_11, *PHEADER_802_11;
@ -744,42 +556,24 @@ typedef struct PACKED _HEADER_802_3 {
////Block ACK related format ////Block ACK related format
// 2-byte BA Parameter field in DELBA frames to terminate an already set up bA // 2-byte BA Parameter field in DELBA frames to terminate an already set up bA
typedef struct PACKED{ typedef struct PACKED{
#ifdef RT_BIG_ENDIAN
USHORT TID:4; // value of TC os TS
USHORT Initiator:1; // 1: originator 0:recipient
USHORT Rsv:11; // always set to 0
#else
USHORT Rsv:11; // always set to 0 USHORT Rsv:11; // always set to 0
USHORT Initiator:1; // 1: originator 0:recipient USHORT Initiator:1; // 1: originator 0:recipient
USHORT TID:4; // value of TC os TS USHORT TID:4; // value of TC os TS
#endif /* !RT_BIG_ENDIAN */
} DELBA_PARM, *PDELBA_PARM; } DELBA_PARM, *PDELBA_PARM;
// 2-byte BA Parameter Set field in ADDBA frames to signal parm for setting up a BA // 2-byte BA Parameter Set field in ADDBA frames to signal parm for setting up a BA
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT BufSize:10; // number of buffe of size 2304 octetsr
USHORT TID:4; // value of TC os TS
USHORT BAPolicy:1; // 1: immediately BA 0:delayed BA
USHORT AMSDUSupported:1; // 0: not permitted 1: permitted
#else
USHORT AMSDUSupported:1; // 0: not permitted 1: permitted USHORT AMSDUSupported:1; // 0: not permitted 1: permitted
USHORT BAPolicy:1; // 1: immediately BA 0:delayed BA USHORT BAPolicy:1; // 1: immediately BA 0:delayed BA
USHORT TID:4; // value of TC os TS USHORT TID:4; // value of TC os TS
USHORT BufSize:10; // number of buffe of size 2304 octetsr USHORT BufSize:10; // number of buffe of size 2304 octetsr
#endif /* !RT_BIG_ENDIAN */
} BA_PARM, *PBA_PARM; } BA_PARM, *PBA_PARM;
// 2-byte BA Starting Seq CONTROL field // 2-byte BA Starting Seq CONTROL field
typedef union PACKED { typedef union PACKED {
struct PACKED { struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT StartSeq:12; // sequence number of the 1st MSDU for which this BAR is sent
USHORT FragNum:4; // always set to 0
#else
USHORT FragNum:4; // always set to 0 USHORT FragNum:4; // always set to 0
USHORT StartSeq:12; // sequence number of the 1st MSDU for which this BAR is sent USHORT StartSeq:12; // sequence number of the 1st MSDU for which this BAR is sent
#endif /* RT_BIG_ENDIAN */
} field; } field;
USHORT word; USHORT word;
} BASEQ_CONTROL, *PBASEQ_CONTROL; } BASEQ_CONTROL, *PBASEQ_CONTROL;
@ -787,63 +581,34 @@ typedef union PACKED {
//BAControl and BARControl are the same //BAControl and BARControl are the same
// 2-byte BA CONTROL field in BA frame // 2-byte BA CONTROL field in BA frame
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT TID:4;
USHORT Rsv:9;
USHORT Compressed:1;
USHORT MTID:1; //EWC V1.24
USHORT ACKPolicy:1; // only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK 1:No ACK
#else
USHORT ACKPolicy:1; // only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK 1:No ACK USHORT ACKPolicy:1; // only related to N-Delayed BA. But not support in RT2860b. 0:NormalACK 1:No ACK
USHORT MTID:1; //EWC V1.24 USHORT MTID:1; //EWC V1.24
USHORT Compressed:1; USHORT Compressed:1;
USHORT Rsv:9; USHORT Rsv:9;
USHORT TID:4; USHORT TID:4;
#endif /* !RT_BIG_ENDIAN */
} BA_CONTROL, *PBA_CONTROL; } BA_CONTROL, *PBA_CONTROL;
// 2-byte BAR CONTROL field in BAR frame // 2-byte BAR CONTROL field in BAR frame
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT TID:4;
USHORT Rsv1:9;
USHORT Compressed:1;
USHORT MTID:1; //if this bit1, use FRAME_MTBA_REQ, if 0, use FRAME_BA_REQ
USHORT ACKPolicy:1;
#else
USHORT ACKPolicy:1; // 0:normal ack, 1:no ack. USHORT ACKPolicy:1; // 0:normal ack, 1:no ack.
USHORT MTID:1; //if this bit1, use FRAME_MTBA_REQ, if 0, use FRAME_BA_REQ USHORT MTID:1; //if this bit1, use FRAME_MTBA_REQ, if 0, use FRAME_BA_REQ
USHORT Compressed:1; USHORT Compressed:1;
USHORT Rsv1:9; USHORT Rsv1:9;
USHORT TID:4; USHORT TID:4;
#endif /* !RT_BIG_ENDIAN */
} BAR_CONTROL, *PBAR_CONTROL; } BAR_CONTROL, *PBAR_CONTROL;
// BARControl in MTBAR frame // BARControl in MTBAR frame
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT NumTID:4;
USHORT Rsv1:9;
USHORT Compressed:1;
USHORT MTID:1;
USHORT ACKPolicy:1;
#else
USHORT ACKPolicy:1; USHORT ACKPolicy:1;
USHORT MTID:1; USHORT MTID:1;
USHORT Compressed:1; USHORT Compressed:1;
USHORT Rsv1:9; USHORT Rsv1:9;
USHORT NumTID:4; USHORT NumTID:4;
#endif /* !RT_BIG_ENDIAN */
} MTBAR_CONTROL, *PMTBAR_CONTROL; } MTBAR_CONTROL, *PMTBAR_CONTROL;
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT TID:4;
USHORT Rsv1:12;
#else
USHORT Rsv1:12; USHORT Rsv1:12;
USHORT TID:4; USHORT TID:4;
#endif /* !RT_BIG_ENDIAN */
} PER_TID_INFO, *PPER_TID_INFO; } PER_TID_INFO, *PPER_TID_INFO;
typedef struct { typedef struct {
@ -1063,15 +828,6 @@ typedef struct {
// QBSS Info field in QSTA's assoc req // QBSS Info field in QSTA's assoc req
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
UCHAR Rsv2:1;
UCHAR MaxSPLength:2;
UCHAR Rsv1:1;
UCHAR UAPSD_AC_BE:1;
UCHAR UAPSD_AC_BK:1;
UCHAR UAPSD_AC_VI:1;
UCHAR UAPSD_AC_VO:1;
#else
UCHAR UAPSD_AC_VO:1; UCHAR UAPSD_AC_VO:1;
UCHAR UAPSD_AC_VI:1; UCHAR UAPSD_AC_VI:1;
UCHAR UAPSD_AC_BK:1; UCHAR UAPSD_AC_BK:1;
@ -1079,20 +835,13 @@ typedef struct PACKED {
UCHAR Rsv1:1; UCHAR Rsv1:1;
UCHAR MaxSPLength:2; UCHAR MaxSPLength:2;
UCHAR Rsv2:1; UCHAR Rsv2:1;
#endif /* !RT_BIG_ENDIAN */
} QBSS_STA_INFO_PARM, *PQBSS_STA_INFO_PARM; } QBSS_STA_INFO_PARM, *PQBSS_STA_INFO_PARM;
// QBSS Info field in QAP's Beacon/ProbeRsp // QBSS Info field in QAP's Beacon/ProbeRsp
typedef struct PACKED { typedef struct PACKED {
#ifdef RT_BIG_ENDIAN
UCHAR UAPSD:1;
UCHAR Rsv:3;
UCHAR ParamSetCount:4;
#else
UCHAR ParamSetCount:4; UCHAR ParamSetCount:4;
UCHAR Rsv:3; UCHAR Rsv:3;
UCHAR UAPSD:1; UCHAR UAPSD:1;
#endif /* !RT_BIG_ENDIAN */
} QBSS_AP_INFO_PARM, *PQBSS_AP_INFO_PARM; } QBSS_AP_INFO_PARM, *PQBSS_AP_INFO_PARM;
// QOS Capability reported in QAP's BEACON/ProbeRsp // QOS Capability reported in QAP's BEACON/ProbeRsp
@ -1343,21 +1092,12 @@ typedef struct PACKED {
typedef struct PACKED _RTMP_TX_RATE_SWITCH typedef struct PACKED _RTMP_TX_RATE_SWITCH
{ {
UCHAR ItemNo; UCHAR ItemNo;
#ifdef RT_BIG_ENDIAN
UCHAR Rsv2:2;
UCHAR Mode:2;
UCHAR Rsv1:1;
UCHAR BW:1;
UCHAR ShortGI:1;
UCHAR STBC:1;
#else
UCHAR STBC:1; UCHAR STBC:1;
UCHAR ShortGI:1; UCHAR ShortGI:1;
UCHAR BW:1; UCHAR BW:1;
UCHAR Rsv1:1; UCHAR Rsv1:1;
UCHAR Mode:2; UCHAR Mode:2;
UCHAR Rsv2:2; UCHAR Rsv2:2;
#endif
UCHAR CurrMCS; UCHAR CurrMCS;
UCHAR TrainUp; UCHAR TrainUp;
UCHAR TrainDown; UCHAR TrainDown;

13
drivers/staging/rt3070/oid.h
View File

@ -737,18 +737,6 @@ enum {
// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!! // MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI. Don't change this definition!!!
typedef union _HTTRANSMIT_SETTING { typedef union _HTTRANSMIT_SETTING {
#ifdef RT_BIG_ENDIAN
struct {
USHORT MODE:2; // Use definition MODE_xxx.
// USHORT rsv:3;
USHORT TxBF:1;
USHORT rsv:2;
USHORT STBC:2; //SPACE
USHORT ShortGI:1;
USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
USHORT MCS:7; // MCS
} field;
#else
struct { struct {
USHORT MCS:7; // MCS USHORT MCS:7; // MCS
USHORT BW:1; //channel bandwidth 20MHz or 40 MHz USHORT BW:1; //channel bandwidth 20MHz or 40 MHz
@ -759,7 +747,6 @@ typedef union _HTTRANSMIT_SETTING {
USHORT TxBF:1; USHORT TxBF:1;
USHORT MODE:2; // Use definition MODE_xxx. USHORT MODE:2; // Use definition MODE_xxx.
} field; } field;
#endif
USHORT word; USHORT word;
} HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING; } HTTRANSMIT_SETTING, *PHTTRANSMIT_SETTING;

40
drivers/staging/rt3070/rt2870.h
View File

@ -157,30 +157,6 @@
// //
// RXINFO appends at the end of each rx packet. // RXINFO appends at the end of each rx packet.
// //
#ifdef RT_BIG_ENDIAN
typedef struct PACKED _RXINFO_STRUC {
UINT32 PlcpSignal:12;
UINT32 LastAMSDU:1;
UINT32 CipherAlg:1;
UINT32 PlcpRssil:1;
UINT32 Decrypted:1;
UINT32 AMPDU:1; // To be moved
UINT32 L2PAD:1;
UINT32 RSSI:1;
UINT32 HTC:1;
UINT32 AMSDU:1; // rx with 802.3 header, not 802.11 header.
UINT32 CipherErr:2; // 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid
UINT32 Crc:1; // 1: CRC error
UINT32 MyBss:1; // 1: this frame belongs to the same BSSID
UINT32 Bcast:1; // 1: this is a broadcast frame
UINT32 Mcast:1; // 1: this is a multicast frame
UINT32 U2M:1; // 1: this RX frame is unicast to me
UINT32 FRAG:1;
UINT32 NULLDATA:1;
UINT32 DATA:1;
UINT32 BA:1;
} RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
#else
typedef struct PACKED _RXINFO_STRUC { typedef struct PACKED _RXINFO_STRUC {
UINT32 BA:1; UINT32 BA:1;
UINT32 DATA:1; UINT32 DATA:1;
@ -203,25 +179,10 @@ typedef struct PACKED _RXINFO_STRUC {
UINT32 LastAMSDU:1; UINT32 LastAMSDU:1;
UINT32 PlcpSignal:12; UINT32 PlcpSignal:12;
} RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC; } RXINFO_STRUC, *PRXINFO_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC;
#endif
// //
// TXINFO // TXINFO
// //
#ifdef RT_BIG_ENDIAN
typedef struct _TXINFO_STRUC {
// Word 0
UINT32 USBDMATxburst:1;//used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint
UINT32 USBDMANextVLD:1; //used ONLY in USB bulk Aggregation, NextValid
UINT32 rsv2:2; // Software use.
UINT32 SwUseLastRound:1; // Software use.
UINT32 QSEL:2; // select on-chip FIFO ID for 2nd-stage output scheduler.0:MGMT, 1:HCCA 2:EDCA
UINT32 WIV:1; // Wireless Info Valid. 1 if Driver already fill WI, o if DMA needs to copy WI to correctposition
UINT32 rsv:8;
UINT32 USBDMATxPktLen:16; //used ONLY in USB bulk Aggregation, Total byte counts of all sub-frame.
} TXINFO_STRUC, *PTXINFO_STRUC;
#else
typedef struct _TXINFO_STRUC { typedef struct _TXINFO_STRUC {
// Word 0 // Word 0
UINT32 USBDMATxPktLen:16; //used ONLY in USB bulk Aggregation, Total byte counts of all sub-frame. UINT32 USBDMATxPktLen:16; //used ONLY in USB bulk Aggregation, Total byte counts of all sub-frame.
@ -233,7 +194,6 @@ typedef struct _TXINFO_STRUC {
UINT32 USBDMANextVLD:1; //used ONLY in USB bulk Aggregation, NextValid UINT32 USBDMANextVLD:1; //used ONLY in USB bulk Aggregation, NextValid
UINT32 USBDMATxburst:1;//used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint UINT32 USBDMATxburst:1;//used ONLY in USB bulk Aggre. Force USB DMA transmit frame from current selected endpoint
} TXINFO_STRUC, *PTXINFO_STRUC; } TXINFO_STRUC, *PTXINFO_STRUC;
#endif
#define TXINFO_SIZE 4 #define TXINFO_SIZE 4
#define RXINFO_SIZE 4 #define RXINFO_SIZE 4

1174
drivers/staging/rt3070/rt28xx.h
View File

File diff suppressed because it is too large Load Diff

296
drivers/staging/rt3070/rtmp.h
View File

@ -877,17 +877,10 @@ typedef struct _RTMP_DMABUF
typedef union _HEADER_802_11_SEQ{ typedef union _HEADER_802_11_SEQ{
#ifdef RT_BIG_ENDIAN
struct {
USHORT Sequence:12;
USHORT Frag:4;
} field;
#else
struct { struct {
USHORT Frag:4; USHORT Frag:4;
USHORT Sequence:12; USHORT Sequence:12;
} field; } field;
#endif
USHORT value; USHORT value;
} HEADER_802_11_SEQ, *PHEADER_802_11_SEQ; } HEADER_802_11_SEQ, *PHEADER_802_11_SEQ;
@ -1103,15 +1096,6 @@ typedef struct _ARCFOUR
// MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI too. just copy to TXWI. // MIMO Tx parameter, ShortGI, MCS, STBC, etc. these are fields in TXWI too. just copy to TXWI.
typedef struct _RECEIVE_SETTING { typedef struct _RECEIVE_SETTING {
#ifdef RT_BIG_ENDIAN
USHORT MIMO:1;
USHORT OFDM:1;
USHORT rsv:3;
USHORT STBC:2; //SPACE
USHORT ShortGI:1;
USHORT Mode:2; //channel bandwidth 20MHz or 40 MHz
USHORT NumOfRX:2; // MIMO. WE HAVE 3R
#else
USHORT NumOfRX:2; // MIMO. WE HAVE 3R USHORT NumOfRX:2; // MIMO. WE HAVE 3R
USHORT Mode:2; //channel bandwidth 20MHz or 40 MHz USHORT Mode:2; //channel bandwidth 20MHz or 40 MHz
USHORT ShortGI:1; USHORT ShortGI:1;
@ -1119,7 +1103,6 @@ typedef struct _RECEIVE_SETTING {
USHORT rsv:3; USHORT rsv:3;
USHORT OFDM:1; USHORT OFDM:1;
USHORT MIMO:1; USHORT MIMO:1;
#endif
} RECEIVE_SETTING, *PRECEIVE_SETTING; } RECEIVE_SETTING, *PRECEIVE_SETTING;
// Shared key data structure // Shared key data structure
@ -1455,21 +1438,6 @@ typedef struct _QUERYBA_TABLE{
} QUERYBA_TABLE, *PQUERYBA_TABLE; } QUERYBA_TABLE, *PQUERYBA_TABLE;
typedef union _BACAP_STRUC { typedef union _BACAP_STRUC {
#ifdef RT_BIG_ENDIAN
struct {
UINT32 :4;
UINT32 b2040CoexistScanSup:1; //As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz.
UINT32 bHtAdhoc:1; // adhoc can use ht rate.
UINT32 MMPSmode:2; // MIMO power save more, 0:static, 1:dynamic, 2:rsv, 3:mimo enable
UINT32 AmsduSize:1; // 0:3839, 1:7935 bytes. UINT MSDUSizeToBytes[] = { 3839, 7935};
UINT32 AmsduEnable:1; //Enable AMSDU transmisstion
UINT32 MpduDensity:3;
UINT32 Policy:2; // 0: DELAY_BA 1:IMMED_BA (//BA Policy subfiled value in ADDBA frame) 2:BA-not use
UINT32 AutoBA:1; // automatically BA
UINT32 TxBAWinLimit:8;
UINT32 RxBAWinLimit:8;
} field;
#else
struct { struct {
UINT32 RxBAWinLimit:8; UINT32 RxBAWinLimit:8;
UINT32 TxBAWinLimit:8; UINT32 TxBAWinLimit:8;
@ -1483,7 +1451,6 @@ typedef union _BACAP_STRUC {
UINT32 b2040CoexistScanSup:1; //As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz. UINT32 b2040CoexistScanSup:1; //As Sta, support do 2040 coexistence scan for AP. As Ap, support monitor trigger event to check if can use BW 40MHz.
UINT32 :4; UINT32 :4;
} field; } field;
#endif
UINT32 word; UINT32 word;
} BACAP_STRUC, *PBACAP_STRUC; } BACAP_STRUC, *PBACAP_STRUC;
#endif // DOT11_N_SUPPORT // #endif // DOT11_N_SUPPORT //
@ -1512,21 +1479,6 @@ typedef struct _IOT_STRUC {
// This is the registry setting for 802.11n transmit setting. Used in advanced page. // This is the registry setting for 802.11n transmit setting. Used in advanced page.
typedef union _REG_TRANSMIT_SETTING { typedef union _REG_TRANSMIT_SETTING {
#ifdef RT_BIG_ENDIAN
struct {
UINT32 rsv:13;
UINT32 EXTCHA:2;
UINT32 HTMODE:1;
UINT32 TRANSNO:2;
UINT32 STBC:1; //SPACE
UINT32 ShortGI:1;
UINT32 BW:1; //channel bandwidth 20MHz or 40 MHz
UINT32 TxBF:1; // 3*3
UINT32 rsv0:10;
//UINT32 MCS:7; // MCS
//UINT32 PhyMode:4;
} field;
#else
struct { struct {
//UINT32 PhyMode:4; //UINT32 PhyMode:4;
//UINT32 MCS:7; // MCS //UINT32 MCS:7; // MCS
@ -1540,26 +1492,16 @@ typedef union _REG_TRANSMIT_SETTING {
UINT32 EXTCHA:2; UINT32 EXTCHA:2;
UINT32 rsv:13; UINT32 rsv:13;
} field; } field;
#endif
UINT32 word; UINT32 word;
} REG_TRANSMIT_SETTING, *PREG_TRANSMIT_SETTING; } REG_TRANSMIT_SETTING, *PREG_TRANSMIT_SETTING;
typedef union _DESIRED_TRANSMIT_SETTING { typedef union _DESIRED_TRANSMIT_SETTING {
#ifdef RT_BIG_ENDIAN
struct {
USHORT rsv:3;
USHORT FixedTxMode:2; // If MCS isn't AUTO, fix rate in CCK, OFDM or HT mode.
USHORT PhyMode:4;
USHORT MCS:7; // MCS
} field;
#else
struct { struct {
USHORT MCS:7; // MCS USHORT MCS:7; // MCS
USHORT PhyMode:4; USHORT PhyMode:4;
USHORT FixedTxMode:2; // If MCS isn't AUTO, fix rate in CCK, OFDM or HT mode. USHORT FixedTxMode:2; // If MCS isn't AUTO, fix rate in CCK, OFDM or HT mode.
USHORT rsv:3; USHORT rsv:3;
} field; } field;
#endif
USHORT word; USHORT word;
} DESIRED_TRANSMIT_SETTING, *PDESIRED_TRANSMIT_SETTING; } DESIRED_TRANSMIT_SETTING, *PDESIRED_TRANSMIT_SETTING;
@ -3072,244 +3014,6 @@ typedef struct _TX_BLK_
//------------------------------------------------------------------------------------------ //------------------------------------------------------------------------------------------
#ifdef RT_BIG_ENDIAN
static inline VOID WriteBackToDescriptor(
IN PUCHAR Dest,
IN PUCHAR Src,
IN BOOLEAN DoEncrypt,
IN ULONG DescriptorType)
{
UINT32 *p1, *p2;
p1 = ((UINT32 *)Dest);
p2 = ((UINT32 *)Src);
*p1 = *p2;
*(p1+2) = *(p2+2);
*(p1+3) = *(p2+3);
*(p1+1) = *(p2+1); // Word 1; this must be written back last
}
/*
========================================================================
Routine Description:
Endian conversion of Tx/Rx descriptor .
Arguments:
pAd Pointer to our adapter
pData Pointer to Tx/Rx descriptor
DescriptorType Direction of the frame
Return Value:
None
Note:
Call this function when read or update descriptor
========================================================================
*/
static inline VOID RTMPWIEndianChange(
IN PUCHAR pData,
IN ULONG DescriptorType)
{
int size;
int i;
size = ((DescriptorType == TYPE_TXWI) ? TXWI_SIZE : RXWI_SIZE);
if(DescriptorType == TYPE_TXWI)
{
*((UINT32 *)(pData)) = SWAP32(*((UINT32 *)(pData))); // Byte 0~3
*((UINT32 *)(pData + 4)) = SWAP32(*((UINT32 *)(pData+4))); // Byte 4~7
}
else
{
for(i=0; i < size/4 ; i++)
*(((UINT32 *)pData) +i) = SWAP32(*(((UINT32 *)pData)+i));
}
}
/*
========================================================================
Routine Description:
Endian conversion of Tx/Rx descriptor .
Arguments:
pAd Pointer to our adapter
pData Pointer to Tx/Rx descriptor
DescriptorType Direction of the frame
Return Value:
None
Note:
Call this function when read or update descriptor
========================================================================
*/
#ifdef RT2870
static inline VOID RTMPDescriptorEndianChange(
IN PUCHAR pData,
IN ULONG DescriptorType)
{
*((UINT32 *)(pData)) = SWAP32(*((UINT32 *)(pData)));
}
#endif // RT2870 //
/*
========================================================================
Routine Description:
Endian conversion of all kinds of 802.11 frames .
Arguments:
pAd Pointer to our adapter
pData Pointer to the 802.11 frame structure
Dir Direction of the frame
FromRxDoneInt Caller is from RxDone interrupt
Return Value:
None
Note:
Call this function when read or update buffer data
========================================================================
*/
static inline VOID RTMPFrameEndianChange(
IN PRTMP_ADAPTER pAd,
IN PUCHAR pData,
IN ULONG Dir,
IN BOOLEAN FromRxDoneInt)
{
PHEADER_802_11 pFrame;
PUCHAR pMacHdr;
// swab 16 bit fields - Frame Control field
if(Dir == DIR_READ)
{
*(USHORT *)pData = SWAP16(*(USHORT *)pData);
}
pFrame = (PHEADER_802_11) pData;
pMacHdr = (PUCHAR) pFrame;
// swab 16 bit fields - Duration/ID field
*(USHORT *)(pMacHdr + 2) = SWAP16(*(USHORT *)(pMacHdr + 2));
// swab 16 bit fields - Sequence Control field
*(USHORT *)(pMacHdr + 22) = SWAP16(*(USHORT *)(pMacHdr + 22));
if(pFrame->FC.Type == BTYPE_MGMT)
{
switch(pFrame->FC.SubType)
{
case SUBTYPE_ASSOC_REQ:
case SUBTYPE_REASSOC_REQ:
// swab 16 bit fields - CapabilityInfo field
pMacHdr += sizeof(HEADER_802_11);
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
// swab 16 bit fields - Listen Interval field
pMacHdr += 2;
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
break;
case SUBTYPE_ASSOC_RSP:
case SUBTYPE_REASSOC_RSP:
// swab 16 bit fields - CapabilityInfo field
pMacHdr += sizeof(HEADER_802_11);
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
// swab 16 bit fields - Status Code field
pMacHdr += 2;
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
// swab 16 bit fields - AID field
pMacHdr += 2;
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
break;
case SUBTYPE_AUTH:
// If from APHandleRxDoneInterrupt routine, it is still a encrypt format.
// The convertion is delayed to RTMPHandleDecryptionDoneInterrupt.
if(!FromRxDoneInt && pFrame->FC.Wep == 1)
break;
else
{
// swab 16 bit fields - Auth Alg No. field
pMacHdr += sizeof(HEADER_802_11);
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
// swab 16 bit fields - Auth Seq No. field
pMacHdr += 2;
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
// swab 16 bit fields - Status Code field
pMacHdr += 2;
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
}
break;
case SUBTYPE_BEACON:
case SUBTYPE_PROBE_RSP:
// swab 16 bit fields - BeaconInterval field
pMacHdr += (sizeof(HEADER_802_11) + TIMESTAMP_LEN);
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
// swab 16 bit fields - CapabilityInfo field
pMacHdr += sizeof(USHORT);
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
break;
case SUBTYPE_DEAUTH:
case SUBTYPE_DISASSOC:
// swab 16 bit fields - Reason code field
pMacHdr += sizeof(HEADER_802_11);
*(USHORT *)pMacHdr = SWAP16(*(USHORT *)pMacHdr);
break;
}
}
else if( pFrame->FC.Type == BTYPE_DATA )
{
}
else if(pFrame->FC.Type == BTYPE_CNTL)
{
switch(pFrame->FC.SubType)
{
case SUBTYPE_BLOCK_ACK_REQ:
{
PFRAME_BA_REQ pBAReq = (PFRAME_BA_REQ)pFrame;
*(USHORT *)(&pBAReq->BARControl) = SWAP16(*(USHORT *)(&pBAReq->BARControl));
pBAReq->BAStartingSeq.word = SWAP16(pBAReq->BAStartingSeq.word);
}
break;
case SUBTYPE_BLOCK_ACK:
// For Block Ack packet, the HT_CONTROL field is in the same offset with Addr3
*(UINT32 *)(&pFrame->Addr3[0]) = SWAP32(*(UINT32 *)(&pFrame->Addr3[0]));
break;
case SUBTYPE_ACK:
//For ACK packet, the HT_CONTROL field is in the same offset with Addr2
*(UINT32 *)(&pFrame->Addr2[0])= SWAP32(*(UINT32 *)(&pFrame->Addr2[0]));
break;
}
}
else
{
DBGPRINT(RT_DEBUG_ERROR,("Invalid Frame Type!!!\n"));
}
// swab 16 bit fields - Frame Control
if(Dir == DIR_WRITE)
{
*(USHORT *)pData = SWAP16(*(USHORT *)pData);
}
}
#endif // RT_BIG_ENDIAN //
static inline VOID ConvertMulticastIP2MAC( static inline VOID ConvertMulticastIP2MAC(
IN PUCHAR pIpAddr, IN PUCHAR pIpAddr,
IN PUCHAR *ppMacAddr, IN PUCHAR *ppMacAddr,

30
drivers/staging/rt3070/rtmp_def.h
View File

@ -1276,17 +1276,6 @@
#define OPMODE_AP 1 #define OPMODE_AP 1
//#define OPMODE_L3_BRG 2 // as AP and STA at the same time //#define OPMODE_L3_BRG 2 // as AP and STA at the same time
#ifdef RT_BIG_ENDIAN
#define DIR_READ 0
#define DIR_WRITE 1
#define TYPE_TXD 0
#define TYPE_RXD 1
#define TYPE_TXINFO 0
#define TYPE_RXINFO 1
#define TYPE_TXWI 0
#define TYPE_RXWI 1
#endif
// ========================= AP rtmp_def.h =========================== // ========================= AP rtmp_def.h ===========================
// value domain for pAd->EventTab.Log[].Event // value domain for pAd->EventTab.Log[].Event
#define EVENT_RESET_ACCESS_POINT 0 // Log = "hh:mm:ss Restart Access Point" #define EVENT_RESET_ACCESS_POINT 0 // Log = "hh:mm:ss Restart Access Point"
@ -1467,23 +1456,6 @@
(UINT64)(((UINT64)(x) & (UINT64) 0x00ff000000000000ULL) >> 40) | \ (UINT64)(((UINT64)(x) & (UINT64) 0x00ff000000000000ULL) >> 40) | \
(UINT64)(((UINT64)(x) & (UINT64) 0xff00000000000000ULL) >> 56) )) (UINT64)(((UINT64)(x) & (UINT64) 0xff00000000000000ULL) >> 56) ))
#ifdef RT_BIG_ENDIAN
#define cpu2le64(x) SWAP64((x))
#define le2cpu64(x) SWAP64((x))
#define cpu2le32(x) SWAP32((x))
#define le2cpu32(x) SWAP32((x))
#define cpu2le16(x) SWAP16((x))
#define le2cpu16(x) SWAP16((x))
#define cpu2be64(x) ((UINT64)(x))
#define be2cpu64(x) ((UINT64)(x))
#define cpu2be32(x) ((UINT32)(x))
#define be2cpu32(x) ((UINT32)(x))
#define cpu2be16(x) ((UINT16)(x))
#define be2cpu16(x) ((UINT16)(x))
#else // Little_Endian
#define cpu2le64(x) ((UINT64)(x)) #define cpu2le64(x) ((UINT64)(x))
#define le2cpu64(x) ((UINT64)(x)) #define le2cpu64(x) ((UINT64)(x))
#define cpu2le32(x) ((UINT32)(x)) #define cpu2le32(x) ((UINT32)(x))
@ -1497,8 +1469,6 @@
#define cpu2be16(x) SWAP16((x)) #define cpu2be16(x) SWAP16((x))
#define be2cpu16(x) SWAP16((x)) #define be2cpu16(x) SWAP16((x))
#endif // RT_BIG_ENDIAN
#endif // __RTMP_DEF_H__ #endif // __RTMP_DEF_H__

30
drivers/staging/rt3070/spectrum.h
View File

@ -46,16 +46,6 @@ typedef struct PACKED _CH_SW_ANN_INFO
typedef union PACKED _MEASURE_REQ_MODE typedef union PACKED _MEASURE_REQ_MODE
{ {
#ifdef RT_BIG_ENDIAN
struct PACKED
{
UINT8 Rev1:4;
UINT8 Report:1;
UINT8 Request:1;
UINT8 Enable:1;
UINT8 Rev0:1;
} field;
#else
struct PACKED struct PACKED
{ {
UINT8 Rev0:1; UINT8 Rev0:1;
@ -64,7 +54,6 @@ typedef union PACKED _MEASURE_REQ_MODE
UINT8 Report:1; UINT8 Report:1;
UINT8 Rev1:4; UINT8 Rev1:4;
} field; } field;
#endif // RT_BIG_ENDIAN //
UINT8 word; UINT8 word;
} MEASURE_REQ_MODE, *PMEASURE_REQ_MODE; } MEASURE_REQ_MODE, *PMEASURE_REQ_MODE;
@ -85,17 +74,6 @@ typedef struct PACKED _MEASURE_REQ_INFO
typedef union PACKED _MEASURE_BASIC_REPORT_MAP typedef union PACKED _MEASURE_BASIC_REPORT_MAP
{ {
#ifdef RT_BIG_ENDIAN
struct PACKED
{
UINT8 Rev:3;
UINT8 Unmeasure:1;
UINT8 Radar:1;
UINT8 UnidentifiedSignal:1;
UINT8 OfdmPreamble:1;
UINT8 BSS:1;
} field;
#else
struct PACKED struct PACKED
{ {
UINT8 BSS:1; UINT8 BSS:1;
@ -105,7 +83,6 @@ typedef union PACKED _MEASURE_BASIC_REPORT_MAP
UINT8 Unmeasure:1; UINT8 Unmeasure:1;
UINT8 Rev:3; UINT8 Rev:3;
} field; } field;
#endif // RT_BIG_ENDIAN //
UINT8 word; UINT8 word;
} MEASURE_BASIC_REPORT_MAP, *PMEASURE_BASIC_REPORT_MAP; } MEASURE_BASIC_REPORT_MAP, *PMEASURE_BASIC_REPORT_MAP;
@ -137,17 +114,10 @@ typedef union PACKED _MEASURE_REPORT_MODE
{ {
struct PACKED struct PACKED
{ {
#ifdef RT_BIG_ENDIAN
UINT8 Rev:5;
UINT8 Refused:1;
UINT8 Incapable:1;
UINT8 Late:1;
#else
UINT8 Late:1; UINT8 Late:1;
UINT8 Incapable:1; UINT8 Incapable:1;
UINT8 Refused:1; UINT8 Refused:1;
UINT8 Rev:5; UINT8 Rev:5;
#endif // RT_BIG_ENDIAN //
} field; } field;
UINT8 word; UINT8 word;
} MEASURE_REPORT_MODE, *PMEASURE_REPORT_MODE; } MEASURE_REPORT_MODE, *PMEASURE_REPORT_MODE;

17
drivers/staging/rt3070/sta/assoc.c
View File

@ -360,28 +360,11 @@ VOID MlmeAssocReqAction(
} }
else else
{ {
#ifdef RT_BIG_ENDIAN
HT_CAPABILITY_IE HtCapabilityTmp;
#endif
#ifndef RT_BIG_ENDIAN
MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen, MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen,
1, &HtCapIe, 1, &HtCapIe,
1, &pAd->MlmeAux.HtCapabilityLen, 1, &pAd->MlmeAux.HtCapabilityLen,
pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability, pAd->MlmeAux.HtCapabilityLen, &pAd->MlmeAux.HtCapability,
END_OF_ARGS); END_OF_ARGS);
#else
NdisZeroMemory(&HtCapabilityTmp, sizeof(HT_CAPABILITY_IE));
NdisMoveMemory(&HtCapabilityTmp, &pAd->MlmeAux.HtCapability, pAd->MlmeAux.HtCapabilityLen);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
MakeOutgoingFrame(pOutBuffer + FrameLen, &TmpLen,
1, &HtCapIe,
1, &pAd->MlmeAux.HtCapabilityLen,
pAd->MlmeAux.HtCapabilityLen,&HtCapabilityTmp,
END_OF_ARGS);
#endif
} }
FrameLen += TmpLen; FrameLen += TmpLen;
} }

30
drivers/staging/rt3070/sta/connect.c
View File

@ -2484,16 +2484,10 @@ ULONG MakeIbssBeacon(
ULONG TmpLen; ULONG TmpLen;
UCHAR HtLen, HtLen1; UCHAR HtLen, HtLen1;
#ifdef RT_BIG_ENDIAN
HT_CAPABILITY_IE HtCapabilityTmp;
ADD_HT_INFO_IE addHTInfoTmp;
USHORT b2lTmp, b2lTmp2;
#endif
// add HT Capability IE // add HT Capability IE
HtLen = sizeof(pAd->CommonCfg.HtCapability); HtLen = sizeof(pAd->CommonCfg.HtCapability);
HtLen1 = sizeof(pAd->CommonCfg.AddHTInfo); HtLen1 = sizeof(pAd->CommonCfg.AddHTInfo);
#ifndef RT_BIG_ENDIAN
MakeOutgoingFrame(pBeaconFrame+FrameLen, &TmpLen, MakeOutgoingFrame(pBeaconFrame+FrameLen, &TmpLen,
1, &HtCapIe, 1, &HtCapIe,
1, &HtLen, 1, &HtLen,
@ -2502,24 +2496,7 @@ ULONG MakeIbssBeacon(
1, &HtLen1, 1, &HtLen1,
HtLen1, &pAd->CommonCfg.AddHTInfo, HtLen1, &pAd->CommonCfg.AddHTInfo,
END_OF_ARGS); END_OF_ARGS);
#else
NdisMoveMemory(&HtCapabilityTmp, &pAd->CommonCfg.HtCapability, HtLen);
*(USHORT *)(&HtCapabilityTmp.HtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.HtCapInfo));
*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo) = SWAP16(*(USHORT *)(&HtCapabilityTmp.ExtHtCapInfo));
NdisMoveMemory(&addHTInfoTmp, &pAd->CommonCfg.AddHTInfo, HtLen1);
*(USHORT *)(&addHTInfoTmp.AddHtInfo2) = SWAP16(*(USHORT *)(&addHTInfoTmp.AddHtInfo2));
*(USHORT *)(&addHTInfoTmp.AddHtInfo3) = SWAP16(*(USHORT *)(&addHTInfoTmp.AddHtInfo3));
MakeOutgoingFrame(pBeaconFrame+FrameLen, &TmpLen,
1, &HtCapIe,
1, &HtLen,
HtLen, &HtCapabilityTmp,
1, &AddHtInfoIe,
1, &HtLen1,
HtLen1, &addHTInfoTmp,
END_OF_ARGS);
#endif
FrameLen += TmpLen; FrameLen += TmpLen;
} }
#endif // DOT11_N_SUPPORT // #endif // DOT11_N_SUPPORT //
@ -2539,11 +2516,6 @@ ULONG MakeIbssBeacon(
PID_MGMT, PID_BEACON, RATE_1, IFS_HTTXOP, FALSE, &Transmit); PID_MGMT, PID_BEACON, RATE_1, IFS_HTTXOP, FALSE, &Transmit);
} }
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, pBeaconFrame, DIR_WRITE, FALSE);
RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
#endif
DBGPRINT(RT_DEBUG_TRACE, ("MakeIbssBeacon (len=%ld), SupRateLen=%d, ExtRateLen=%d, Channel=%d, PhyMode=%d\n", DBGPRINT(RT_DEBUG_TRACE, ("MakeIbssBeacon (len=%ld), SupRateLen=%d, ExtRateLen=%d, Channel=%d, PhyMode=%d\n",
FrameLen, SupRateLen, ExtRateLen, pAd->CommonCfg.Channel, pAd->CommonCfg.PhyMode)); FrameLen, SupRateLen, ExtRateLen, pAd->CommonCfg.Channel, pAd->CommonCfg.PhyMode));
return FrameLen; return FrameLen;

5
drivers/staging/rt3070/sta/rtmp_data.c
View File

@ -709,11 +709,6 @@ BOOLEAN STARxDoneInterruptHandle(
pRxWI = (PRXWI_STRUC) pData; pRxWI = (PRXWI_STRUC) pData;
pHeader = (PHEADER_802_11) (pData+RXWI_SIZE) ; pHeader = (PHEADER_802_11) (pData+RXWI_SIZE) ;
#ifdef RT_BIG_ENDIAN
RTMPFrameEndianChange(pAd, (PUCHAR)pHeader, DIR_READ, TRUE);
RTMPWIEndianChange((PUCHAR)pRxWI, TYPE_RXWI);
#endif
// build RxCell // build RxCell
RxCell.pRxWI = pRxWI; RxCell.pRxWI = pRxWI;
RxCell.pHeader = pHeader; RxCell.pHeader = pHeader;

29
drivers/staging/rt3070/wpa.h
View File

@ -149,19 +149,6 @@
// EAPOL Key Information definition within Key descriptor format // EAPOL Key Information definition within Key descriptor format
typedef struct PACKED _KEY_INFO typedef struct PACKED _KEY_INFO
{ {
#ifdef RT_BIG_ENDIAN
UCHAR KeyAck:1;
UCHAR Install:1;
UCHAR KeyIndex:2;
UCHAR KeyType:1;
UCHAR KeyDescVer:3;
UCHAR Rsvd:3;
UCHAR EKD_DL:1; // EKD for AP; DL for STA
UCHAR Request:1;
UCHAR Error:1;
UCHAR Secure:1;
UCHAR KeyMic:1;
#else
UCHAR KeyMic:1; UCHAR KeyMic:1;
UCHAR Secure:1; UCHAR Secure:1;
UCHAR Error:1; UCHAR Error:1;
@ -173,7 +160,6 @@ typedef struct PACKED _KEY_INFO
UCHAR KeyIndex:2; UCHAR KeyIndex:2;
UCHAR Install:1; UCHAR Install:1;
UCHAR KeyAck:1; UCHAR KeyAck:1;
#endif
} KEY_INFO, *PKEY_INFO; } KEY_INFO, *PKEY_INFO;
// EAPOL Key descriptor format // EAPOL Key descriptor format
@ -203,17 +189,10 @@ typedef struct PACKED _EAPOL_PACKET
//802.11i D10 page 83 //802.11i D10 page 83
typedef struct PACKED _GTK_ENCAP typedef struct PACKED _GTK_ENCAP
{ {
#ifndef RT_BIG_ENDIAN
UCHAR Kid:2; UCHAR Kid:2;
UCHAR tx:1; UCHAR tx:1;
UCHAR rsv:5; UCHAR rsv:5;
UCHAR rsv1; UCHAR rsv1;
#else
UCHAR rsv:5;
UCHAR tx:1;
UCHAR Kid:2;
UCHAR rsv1;
#endif
UCHAR GTK[TKIP_GTK_LENGTH]; UCHAR GTK[TKIP_GTK_LENGTH];
} GTK_ENCAP, *PGTK_ENCAP; } GTK_ENCAP, *PGTK_ENCAP;
@ -257,19 +236,11 @@ typedef struct PACKED _RSNIE_AUTH {
typedef union PACKED _RSN_CAPABILITIES { typedef union PACKED _RSN_CAPABILITIES {
struct PACKED { struct PACKED {
#ifdef RT_BIG_ENDIAN
USHORT Rsvd:10;
USHORT GTKSA_R_Counter:2;
USHORT PTKSA_R_Counter:2;
USHORT No_Pairwise:1;
USHORT PreAuth:1;
#else
USHORT PreAuth:1; USHORT PreAuth:1;
USHORT No_Pairwise:1; USHORT No_Pairwise:1;
USHORT PTKSA_R_Counter:2; USHORT PTKSA_R_Counter:2;
USHORT GTKSA_R_Counter:2; USHORT GTKSA_R_Counter:2;
USHORT Rsvd:10; USHORT Rsvd:10;
#endif
} field; } field;
USHORT word; USHORT word;
} RSN_CAPABILITIES, *PRSN_CAPABILITIES; } RSN_CAPABILITIES, *PRSN_CAPABILITIES;