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pinctrl: mvebu: dove: use remapped mpp4 register
Now that we have an ioremapped mpp4 register, get rid of hardcoded physical addresses. While at it, also remove DOVE_ prefix from those macros. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@ -46,18 +46,19 @@
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#define DOVE_AU1_SPDIFO_GPIO_EN BIT(1)
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#define DOVE_NAND_GPIO_EN BIT(0)
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#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xd0400)
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#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_LO_VIRT_BASE + 0x40)
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#define DOVE_SPI_GPIO_SEL BIT(5)
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#define DOVE_UART1_GPIO_SEL BIT(4)
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#define DOVE_AU1_GPIO_SEL BIT(3)
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#define DOVE_CAM_GPIO_SEL BIT(2)
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#define DOVE_SD1_GPIO_SEL BIT(1)
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#define DOVE_SD0_GPIO_SEL BIT(0)
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/* MPP Base registers */
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#define PMU_MPP_GENERAL_CTRL 0x10
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#define AU0_AC97_SEL BIT(16)
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/* MPP Control 4 register */
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#define SPI_GPIO_SEL BIT(5)
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#define UART1_GPIO_SEL BIT(4)
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#define AU1_GPIO_SEL BIT(3)
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#define CAM_GPIO_SEL BIT(2)
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#define SD1_GPIO_SEL BIT(1)
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#define SD0_GPIO_SEL BIT(0)
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#define CONFIG_PMU BIT(4)
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static void __iomem *mpp_base;
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@ -115,24 +116,24 @@ static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config)
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static int dove_mpp4_ctrl_get(unsigned pid, unsigned long *config)
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{
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unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
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unsigned long mpp4 = readl(mpp4_base);
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unsigned long mask;
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switch (pid) {
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case 24: /* mpp_camera */
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mask = DOVE_CAM_GPIO_SEL;
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mask = CAM_GPIO_SEL;
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break;
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case 40: /* mpp_sdio0 */
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mask = DOVE_SD0_GPIO_SEL;
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mask = SD0_GPIO_SEL;
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break;
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case 46: /* mpp_sdio1 */
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mask = DOVE_SD1_GPIO_SEL;
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mask = SD1_GPIO_SEL;
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break;
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case 58: /* mpp_spi0 */
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mask = DOVE_SPI_GPIO_SEL;
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mask = SPI_GPIO_SEL;
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break;
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case 62: /* mpp_uart1 */
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mask = DOVE_UART1_GPIO_SEL;
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mask = UART1_GPIO_SEL;
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break;
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default:
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return -EINVAL;
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@ -145,24 +146,24 @@ static int dove_mpp4_ctrl_get(unsigned pid, unsigned long *config)
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static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config)
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{
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unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
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unsigned long mpp4 = readl(mpp4_base);
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unsigned long mask;
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switch (pid) {
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case 24: /* mpp_camera */
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mask = DOVE_CAM_GPIO_SEL;
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mask = CAM_GPIO_SEL;
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break;
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case 40: /* mpp_sdio0 */
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mask = DOVE_SD0_GPIO_SEL;
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mask = SD0_GPIO_SEL;
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break;
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case 46: /* mpp_sdio1 */
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mask = DOVE_SD1_GPIO_SEL;
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mask = SD1_GPIO_SEL;
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break;
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case 58: /* mpp_spi0 */
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mask = DOVE_SPI_GPIO_SEL;
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mask = SPI_GPIO_SEL;
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break;
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case 62: /* mpp_uart1 */
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mask = DOVE_UART1_GPIO_SEL;
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mask = UART1_GPIO_SEL;
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break;
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default:
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return -EINVAL;
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@ -172,7 +173,7 @@ static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config)
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if (config)
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mpp4 |= mask;
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writel(mpp4, DOVE_MPP_CTRL4_VIRT_BASE);
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writel(mpp4, mpp4_base);
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return 0;
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}
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@ -222,13 +223,13 @@ static int dove_audio0_ctrl_set(unsigned pid, unsigned long config)
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static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
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{
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unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
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unsigned int mpp4 = readl(mpp4_base);
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unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
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unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
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unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
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*config = 0;
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if (mpp4 & DOVE_AU1_GPIO_SEL)
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if (mpp4 & AU1_GPIO_SEL)
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*config |= BIT(3);
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if (sspc1 & DOVE_SSP_ON_AU1)
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*config |= BIT(2);
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@ -248,7 +249,7 @@ static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
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static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
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{
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unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
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unsigned int mpp4 = readl(mpp4_base);
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unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
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unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
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unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
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@ -259,7 +260,7 @@ static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
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gcfg2 &= ~DOVE_TWSI_OPTION3_GPIO;
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gmpp &= ~DOVE_AU1_SPDIFO_GPIO_EN;
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sspc1 &= ~DOVE_SSP_ON_AU1;
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mpp4 &= ~DOVE_AU1_GPIO_SEL;
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mpp4 &= ~AU1_GPIO_SEL;
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if (config & BIT(0))
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gcfg2 |= DOVE_TWSI_OPTION3_GPIO;
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@ -268,9 +269,9 @@ static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
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if (config & BIT(2))
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sspc1 |= DOVE_SSP_ON_AU1;
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if (config & BIT(3))
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mpp4 |= DOVE_AU1_GPIO_SEL;
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mpp4 |= AU1_GPIO_SEL;
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writel(mpp4, DOVE_MPP_CTRL4_VIRT_BASE);
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writel(mpp4, mpp4_base);
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writel(sspc1, DOVE_SSP_CTRL_STATUS_1);
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writel(gmpp, DOVE_MPP_GENERAL_VIRT_BASE);
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writel(gcfg2, DOVE_GLOBAL_CONFIG_2);
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