mirror of
https://github.com/FEX-Emu/linux.git
synced 2025-01-14 13:39:10 +00:00
rt2800: add rt2800lib (part four)
Code unification. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Acked-by: Gertjan van Wingerde <gwingerde@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz
John W. Linville
parent
fcf5154118
commit
2ce3399521
@ -1658,3 +1658,160 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(rt2800_init_rfcsr);
|
EXPORT_SYMBOL_GPL(rt2800_init_rfcsr);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* IEEE80211 stack callback functions.
|
||||||
|
*/
|
||||||
|
static void rt2800_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
|
||||||
|
u32 *iv32, u16 *iv16)
|
||||||
|
{
|
||||||
|
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||||
|
struct mac_iveiv_entry iveiv_entry;
|
||||||
|
u32 offset;
|
||||||
|
|
||||||
|
offset = MAC_IVEIV_ENTRY(hw_key_idx);
|
||||||
|
rt2800_register_multiread(rt2x00dev, offset,
|
||||||
|
&iveiv_entry, sizeof(iveiv_entry));
|
||||||
|
|
||||||
|
memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
|
||||||
|
memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rt2800_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
|
||||||
|
{
|
||||||
|
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||||
|
u32 reg;
|
||||||
|
bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, TX_RTS_CFG_RTS_THRES, value);
|
||||||
|
rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, CCK_PROT_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, CCK_PROT_CFG_RTS_TH_EN, enabled);
|
||||||
|
rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, OFDM_PROT_CFG_RTS_TH_EN, enabled);
|
||||||
|
rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, MM20_PROT_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, MM20_PROT_CFG_RTS_TH_EN, enabled);
|
||||||
|
rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, MM40_PROT_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, MM40_PROT_CFG_RTS_TH_EN, enabled);
|
||||||
|
rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, GF20_PROT_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, GF20_PROT_CFG_RTS_TH_EN, enabled);
|
||||||
|
rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, GF40_PROT_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, GF40_PROT_CFG_RTS_TH_EN, enabled);
|
||||||
|
rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int rt2800_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
|
||||||
|
const struct ieee80211_tx_queue_params *params)
|
||||||
|
{
|
||||||
|
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||||
|
struct data_queue *queue;
|
||||||
|
struct rt2x00_field32 field;
|
||||||
|
int retval;
|
||||||
|
u32 reg;
|
||||||
|
u32 offset;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* First pass the configuration through rt2x00lib, that will
|
||||||
|
* update the queue settings and validate the input. After that
|
||||||
|
* we are free to update the registers based on the value
|
||||||
|
* in the queue parameter.
|
||||||
|
*/
|
||||||
|
retval = rt2x00mac_conf_tx(hw, queue_idx, params);
|
||||||
|
if (retval)
|
||||||
|
return retval;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* We only need to perform additional register initialization
|
||||||
|
* for WMM queues/
|
||||||
|
*/
|
||||||
|
if (queue_idx >= 4)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
|
||||||
|
|
||||||
|
/* Update WMM TXOP register */
|
||||||
|
offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
|
||||||
|
field.bit_offset = (queue_idx & 1) * 16;
|
||||||
|
field.bit_mask = 0xffff << field.bit_offset;
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, offset, ®);
|
||||||
|
rt2x00_set_field32(®, field, queue->txop);
|
||||||
|
rt2800_register_write(rt2x00dev, offset, reg);
|
||||||
|
|
||||||
|
/* Update WMM registers */
|
||||||
|
field.bit_offset = queue_idx * 4;
|
||||||
|
field.bit_mask = 0xf << field.bit_offset;
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, field, queue->aifs);
|
||||||
|
rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, field, queue->cw_min);
|
||||||
|
rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG, ®);
|
||||||
|
rt2x00_set_field32(®, field, queue->cw_max);
|
||||||
|
rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
|
||||||
|
|
||||||
|
/* Update EDCA registers */
|
||||||
|
offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, offset, ®);
|
||||||
|
rt2x00_set_field32(®, EDCA_AC0_CFG_TX_OP, queue->txop);
|
||||||
|
rt2x00_set_field32(®, EDCA_AC0_CFG_AIFSN, queue->aifs);
|
||||||
|
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMIN, queue->cw_min);
|
||||||
|
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMAX, queue->cw_max);
|
||||||
|
rt2800_register_write(rt2x00dev, offset, reg);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static u64 rt2800_get_tsf(struct ieee80211_hw *hw)
|
||||||
|
{
|
||||||
|
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||||
|
u64 tsf;
|
||||||
|
u32 reg;
|
||||||
|
|
||||||
|
rt2800_register_read(rt2x00dev, TSF_TIMER_DW1, ®);
|
||||||
|
tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
|
||||||
|
rt2800_register_read(rt2x00dev, TSF_TIMER_DW0, ®);
|
||||||
|
tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
|
||||||
|
|
||||||
|
return tsf;
|
||||||
|
}
|
||||||
|
|
||||||
|
const struct ieee80211_ops rt2800_mac80211_ops = {
|
||||||
|
.tx = rt2x00mac_tx,
|
||||||
|
.start = rt2x00mac_start,
|
||||||
|
.stop = rt2x00mac_stop,
|
||||||
|
.add_interface = rt2x00mac_add_interface,
|
||||||
|
.remove_interface = rt2x00mac_remove_interface,
|
||||||
|
.config = rt2x00mac_config,
|
||||||
|
.configure_filter = rt2x00mac_configure_filter,
|
||||||
|
.set_tim = rt2x00mac_set_tim,
|
||||||
|
.set_key = rt2x00mac_set_key,
|
||||||
|
.get_stats = rt2x00mac_get_stats,
|
||||||
|
.get_tkip_seq = rt2800_get_tkip_seq,
|
||||||
|
.set_rts_threshold = rt2800_set_rts_threshold,
|
||||||
|
.bss_info_changed = rt2x00mac_bss_info_changed,
|
||||||
|
.conf_tx = rt2800_conf_tx,
|
||||||
|
.get_tx_stats = rt2x00mac_get_tx_stats,
|
||||||
|
.get_tsf = rt2800_get_tsf,
|
||||||
|
.rfkill_poll = rt2x00mac_rfkill_poll,
|
||||||
|
};
|
||||||
|
EXPORT_SYMBOL_GPL(rt2800_mac80211_ops);
|
||||||
|
|||||||
@ -129,4 +129,6 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev);
|
|||||||
int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev);
|
int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev);
|
||||||
int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev);
|
int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev);
|
||||||
|
|
||||||
|
extern const struct ieee80211_ops rt2800_mac80211_ops;
|
||||||
|
|
||||||
#endif /* RT2800LIB_H */
|
#endif /* RT2800LIB_H */
|
||||||
|
|||||||
@ -1513,161 +1513,6 @@ static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* IEEE80211 stack callback functions.
|
|
||||||
*/
|
|
||||||
static void rt2800pci_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
|
|
||||||
u32 *iv32, u16 *iv16)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
struct mac_iveiv_entry iveiv_entry;
|
|
||||||
u32 offset;
|
|
||||||
|
|
||||||
offset = MAC_IVEIV_ENTRY(hw_key_idx);
|
|
||||||
rt2800_register_multiread(rt2x00dev, offset,
|
|
||||||
&iveiv_entry, sizeof(iveiv_entry));
|
|
||||||
|
|
||||||
memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
|
|
||||||
memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
|
|
||||||
}
|
|
||||||
|
|
||||||
static int rt2800pci_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
u32 reg;
|
|
||||||
bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, TX_RTS_CFG_RTS_THRES, value);
|
|
||||||
rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, CCK_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, CCK_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, OFDM_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, MM20_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, MM20_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, MM40_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, MM40_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, GF20_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, GF20_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, GF40_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, GF40_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int rt2800pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
|
|
||||||
const struct ieee80211_tx_queue_params *params)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
struct data_queue *queue;
|
|
||||||
struct rt2x00_field32 field;
|
|
||||||
int retval;
|
|
||||||
u32 reg;
|
|
||||||
u32 offset;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* First pass the configuration through rt2x00lib, that will
|
|
||||||
* update the queue settings and validate the input. After that
|
|
||||||
* we are free to update the registers based on the value
|
|
||||||
* in the queue parameter.
|
|
||||||
*/
|
|
||||||
retval = rt2x00mac_conf_tx(hw, queue_idx, params);
|
|
||||||
if (retval)
|
|
||||||
return retval;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* We only need to perform additional register initialization
|
|
||||||
* for WMM queues/
|
|
||||||
*/
|
|
||||||
if (queue_idx >= 4)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
|
|
||||||
|
|
||||||
/* Update WMM TXOP register */
|
|
||||||
offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
|
|
||||||
field.bit_offset = (queue_idx & 1) * 16;
|
|
||||||
field.bit_mask = 0xffff << field.bit_offset;
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, offset, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->txop);
|
|
||||||
rt2800_register_write(rt2x00dev, offset, reg);
|
|
||||||
|
|
||||||
/* Update WMM registers */
|
|
||||||
field.bit_offset = queue_idx * 4;
|
|
||||||
field.bit_mask = 0xf << field.bit_offset;
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->aifs);
|
|
||||||
rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->cw_min);
|
|
||||||
rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->cw_max);
|
|
||||||
rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
|
|
||||||
|
|
||||||
/* Update EDCA registers */
|
|
||||||
offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, offset, ®);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_TX_OP, queue->txop);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_AIFSN, queue->aifs);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMIN, queue->cw_min);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMAX, queue->cw_max);
|
|
||||||
rt2800_register_write(rt2x00dev, offset, reg);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static u64 rt2800pci_get_tsf(struct ieee80211_hw *hw)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
u64 tsf;
|
|
||||||
u32 reg;
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, TSF_TIMER_DW1, ®);
|
|
||||||
tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
|
|
||||||
rt2800_register_read(rt2x00dev, TSF_TIMER_DW0, ®);
|
|
||||||
tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
|
|
||||||
|
|
||||||
return tsf;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct ieee80211_ops rt2800pci_mac80211_ops = {
|
|
||||||
.tx = rt2x00mac_tx,
|
|
||||||
.start = rt2x00mac_start,
|
|
||||||
.stop = rt2x00mac_stop,
|
|
||||||
.add_interface = rt2x00mac_add_interface,
|
|
||||||
.remove_interface = rt2x00mac_remove_interface,
|
|
||||||
.config = rt2x00mac_config,
|
|
||||||
.configure_filter = rt2x00mac_configure_filter,
|
|
||||||
.set_key = rt2x00mac_set_key,
|
|
||||||
.get_stats = rt2x00mac_get_stats,
|
|
||||||
.get_tkip_seq = rt2800pci_get_tkip_seq,
|
|
||||||
.set_rts_threshold = rt2800pci_set_rts_threshold,
|
|
||||||
.bss_info_changed = rt2x00mac_bss_info_changed,
|
|
||||||
.conf_tx = rt2800pci_conf_tx,
|
|
||||||
.get_tx_stats = rt2x00mac_get_tx_stats,
|
|
||||||
.get_tsf = rt2800pci_get_tsf,
|
|
||||||
.rfkill_poll = rt2x00mac_rfkill_poll,
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
|
static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
|
||||||
.irq_handler = rt2800pci_interrupt,
|
.irq_handler = rt2800pci_interrupt,
|
||||||
.probe_hw = rt2800pci_probe_hw,
|
.probe_hw = rt2800pci_probe_hw,
|
||||||
@ -1730,7 +1575,7 @@ static const struct rt2x00_ops rt2800pci_ops = {
|
|||||||
.tx = &rt2800pci_queue_tx,
|
.tx = &rt2800pci_queue_tx,
|
||||||
.bcn = &rt2800pci_queue_bcn,
|
.bcn = &rt2800pci_queue_bcn,
|
||||||
.lib = &rt2800pci_rt2x00_ops,
|
.lib = &rt2800pci_rt2x00_ops,
|
||||||
.hw = &rt2800pci_mac80211_ops,
|
.hw = &rt2800_mac80211_ops,
|
||||||
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
|
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
|
||||||
.debugfs = &rt2800_rt2x00debug,
|
.debugfs = &rt2800_rt2x00debug,
|
||||||
#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
|
#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
|
||||||
|
|||||||
@ -1119,162 +1119,6 @@ static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* IEEE80211 stack callback functions.
|
|
||||||
*/
|
|
||||||
static void rt2800usb_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
|
|
||||||
u32 *iv32, u16 *iv16)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
struct mac_iveiv_entry iveiv_entry;
|
|
||||||
u32 offset;
|
|
||||||
|
|
||||||
offset = MAC_IVEIV_ENTRY(hw_key_idx);
|
|
||||||
rt2800_register_multiread(rt2x00dev, offset,
|
|
||||||
&iveiv_entry, sizeof(iveiv_entry));
|
|
||||||
|
|
||||||
memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
|
|
||||||
memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
|
|
||||||
}
|
|
||||||
|
|
||||||
static int rt2800usb_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
u32 reg;
|
|
||||||
bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, TX_RTS_CFG_RTS_THRES, value);
|
|
||||||
rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, CCK_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, CCK_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, OFDM_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, MM20_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, MM20_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, MM40_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, MM40_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, GF20_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, GF20_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, GF40_PROT_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, GF40_PROT_CFG_RTS_TH_EN, enabled);
|
|
||||||
rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int rt2800usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
|
|
||||||
const struct ieee80211_tx_queue_params *params)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
struct data_queue *queue;
|
|
||||||
struct rt2x00_field32 field;
|
|
||||||
int retval;
|
|
||||||
u32 reg;
|
|
||||||
u32 offset;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* First pass the configuration through rt2x00lib, that will
|
|
||||||
* update the queue settings and validate the input. After that
|
|
||||||
* we are free to update the registers based on the value
|
|
||||||
* in the queue parameter.
|
|
||||||
*/
|
|
||||||
retval = rt2x00mac_conf_tx(hw, queue_idx, params);
|
|
||||||
if (retval)
|
|
||||||
return retval;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* We only need to perform additional register initialization
|
|
||||||
* for WMM queues/
|
|
||||||
*/
|
|
||||||
if (queue_idx >= 4)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
|
|
||||||
|
|
||||||
/* Update WMM TXOP register */
|
|
||||||
offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
|
|
||||||
field.bit_offset = (queue_idx & 1) * 16;
|
|
||||||
field.bit_mask = 0xffff << field.bit_offset;
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, offset, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->txop);
|
|
||||||
rt2800_register_write(rt2x00dev, offset, reg);
|
|
||||||
|
|
||||||
/* Update WMM registers */
|
|
||||||
field.bit_offset = queue_idx * 4;
|
|
||||||
field.bit_mask = 0xf << field.bit_offset;
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->aifs);
|
|
||||||
rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->cw_min);
|
|
||||||
rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG, ®);
|
|
||||||
rt2x00_set_field32(®, field, queue->cw_max);
|
|
||||||
rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
|
|
||||||
|
|
||||||
/* Update EDCA registers */
|
|
||||||
offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, offset, ®);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_TX_OP, queue->txop);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_AIFSN, queue->aifs);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMIN, queue->cw_min);
|
|
||||||
rt2x00_set_field32(®, EDCA_AC0_CFG_CWMAX, queue->cw_max);
|
|
||||||
rt2800_register_write(rt2x00dev, offset, reg);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static u64 rt2800usb_get_tsf(struct ieee80211_hw *hw)
|
|
||||||
{
|
|
||||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
|
||||||
u64 tsf;
|
|
||||||
u32 reg;
|
|
||||||
|
|
||||||
rt2800_register_read(rt2x00dev, TSF_TIMER_DW1, ®);
|
|
||||||
tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
|
|
||||||
rt2800_register_read(rt2x00dev, TSF_TIMER_DW0, ®);
|
|
||||||
tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
|
|
||||||
|
|
||||||
return tsf;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct ieee80211_ops rt2800usb_mac80211_ops = {
|
|
||||||
.tx = rt2x00mac_tx,
|
|
||||||
.start = rt2x00mac_start,
|
|
||||||
.stop = rt2x00mac_stop,
|
|
||||||
.add_interface = rt2x00mac_add_interface,
|
|
||||||
.remove_interface = rt2x00mac_remove_interface,
|
|
||||||
.config = rt2x00mac_config,
|
|
||||||
.configure_filter = rt2x00mac_configure_filter,
|
|
||||||
.set_tim = rt2x00mac_set_tim,
|
|
||||||
.set_key = rt2x00mac_set_key,
|
|
||||||
.get_stats = rt2x00mac_get_stats,
|
|
||||||
.get_tkip_seq = rt2800usb_get_tkip_seq,
|
|
||||||
.set_rts_threshold = rt2800usb_set_rts_threshold,
|
|
||||||
.bss_info_changed = rt2x00mac_bss_info_changed,
|
|
||||||
.conf_tx = rt2800usb_conf_tx,
|
|
||||||
.get_tx_stats = rt2x00mac_get_tx_stats,
|
|
||||||
.get_tsf = rt2800usb_get_tsf,
|
|
||||||
.rfkill_poll = rt2x00mac_rfkill_poll,
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
|
static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
|
||||||
.probe_hw = rt2800usb_probe_hw,
|
.probe_hw = rt2800usb_probe_hw,
|
||||||
.get_firmware_name = rt2800usb_get_firmware_name,
|
.get_firmware_name = rt2800usb_get_firmware_name,
|
||||||
@ -1336,7 +1180,7 @@ static const struct rt2x00_ops rt2800usb_ops = {
|
|||||||
.tx = &rt2800usb_queue_tx,
|
.tx = &rt2800usb_queue_tx,
|
||||||
.bcn = &rt2800usb_queue_bcn,
|
.bcn = &rt2800usb_queue_bcn,
|
||||||
.lib = &rt2800usb_rt2x00_ops,
|
.lib = &rt2800usb_rt2x00_ops,
|
||||||
.hw = &rt2800usb_mac80211_ops,
|
.hw = &rt2800_mac80211_ops,
|
||||||
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
|
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
|
||||||
.debugfs = &rt2800_rt2x00debug,
|
.debugfs = &rt2800_rt2x00debug,
|
||||||
#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
|
#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user