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Merge branches 'x86-fixes-for-linus' and 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, alternative: Call stop_machine_text_poke() on all cpus x86-32: Restore irq stacks NUMA-aware allocations x86, memblock: Fix early_node_mem with big reserved region. * 'x86-uv-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, uv: More Westmere support on SGI UV x86, uv: Enable Westmere support on SGI UV
This commit is contained in:
Linus Torvalds
commit
2d10d8737c
@ -5,7 +5,7 @@
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*
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* SGI UV architectural definitions
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*
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* Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 2007-2010 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_X86_UV_UV_HUB_H
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@ -77,7 +77,8 @@
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*
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* 1111110000000000
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* 5432109876543210
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* pppppppppplc0cch
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* pppppppppplc0cch Nehalem-EX
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* ppppppppplcc0cch Westmere-EX
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* sssssssssss
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*
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* p = pnode bits
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@ -148,12 +149,25 @@ struct uv_hub_info_s {
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unsigned char m_val;
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unsigned char n_val;
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struct uv_scir_s scir;
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unsigned char apic_pnode_shift;
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};
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DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
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#define uv_hub_info (&__get_cpu_var(__uv_hub_info))
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#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu))
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union uvh_apicid {
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unsigned long v;
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struct uvh_apicid_s {
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unsigned long local_apic_mask : 24;
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unsigned long local_apic_shift : 5;
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unsigned long unused1 : 3;
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unsigned long pnode_mask : 24;
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unsigned long pnode_shift : 5;
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unsigned long unused2 : 3;
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} s;
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};
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/*
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* Local & Global MMR space macros.
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* Note: macros are intended to be used ONLY by inline functions
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@ -182,6 +196,7 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
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#define UV_GLOBAL_MMR64_PNODE_BITS(p) \
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(((unsigned long)(p)) << UV_GLOBAL_MMR64_PNODE_SHIFT)
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#define UVH_APICID 0x002D0E00L
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#define UV_APIC_PNODE_SHIFT 6
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/* Local Bus from cpu's perspective */
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@ -280,7 +295,7 @@ static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset)
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*/
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static inline int uv_apicid_to_pnode(int apicid)
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{
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return (apicid >> UV_APIC_PNODE_SHIFT);
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return (apicid >> uv_hub_info->apic_pnode_shift);
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}
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/*
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@ -638,7 +638,7 @@ void *__kprobes text_poke_smp(void *addr, const void *opcode, size_t len)
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atomic_set(&stop_machine_first, 1);
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wrote_text = 0;
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/* Use __stop_machine() because the caller already got online_cpus. */
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__stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
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__stop_machine(stop_machine_text_poke, (void *)&tpp, cpu_online_mask);
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return addr;
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}
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@ -5,7 +5,7 @@
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*
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* SGI UV APIC functions (note: not an Intel compatible APIC)
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*
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* Copyright (C) 2007-2009 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 2007-2010 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/cpumask.h>
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#include <linux/hardirq.h>
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@ -41,6 +41,7 @@ DEFINE_PER_CPU(int, x2apic_extra_bits);
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static enum uv_system_type uv_system_type;
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static u64 gru_start_paddr, gru_end_paddr;
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static union uvh_apicid uvh_apicid;
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int uv_min_hub_revision_id;
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EXPORT_SYMBOL_GPL(uv_min_hub_revision_id);
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static DEFINE_SPINLOCK(uv_nmi_lock);
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@ -70,12 +71,27 @@ static int early_get_nodeid(void)
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return node_id.s.node_id;
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}
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static void __init early_get_apic_pnode_shift(void)
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{
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unsigned long *mmr;
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mmr = early_ioremap(UV_LOCAL_MMR_BASE | UVH_APICID, sizeof(*mmr));
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uvh_apicid.v = *mmr;
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early_iounmap(mmr, sizeof(*mmr));
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if (!uvh_apicid.v)
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/*
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* Old bios, use default value
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*/
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uvh_apicid.s.pnode_shift = UV_APIC_PNODE_SHIFT;
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}
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static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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int nodeid;
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if (!strcmp(oem_id, "SGI")) {
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nodeid = early_get_nodeid();
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early_get_apic_pnode_shift();
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x86_platform.is_untracked_pat_range = uv_is_untracked_pat_range;
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x86_platform.nmi_init = uv_nmi_init;
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if (!strcmp(oem_table_id, "UVL"))
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@ -84,7 +100,7 @@ static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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uv_system_type = UV_X2APIC;
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else if (!strcmp(oem_table_id, "UVH")) {
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__get_cpu_var(x2apic_extra_bits) =
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nodeid << (UV_APIC_PNODE_SHIFT - 1);
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nodeid << (uvh_apicid.s.pnode_shift - 1);
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uv_system_type = UV_NON_UNIQUE_APIC;
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return 1;
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}
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@ -716,6 +732,10 @@ void __init uv_system_init(void)
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int apicid = per_cpu(x86_cpu_to_apicid, cpu);
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nid = cpu_to_node(cpu);
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/*
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* apic_pnode_shift must be set before calling uv_apicid_to_pnode();
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*/
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uv_cpu_hub_info(cpu)->apic_pnode_shift = uvh_apicid.s.pnode_shift;
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pnode = uv_apicid_to_pnode(apicid);
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blade = boot_pnode_to_blade(pnode);
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lcpu = uv_blade_info[blade].nr_possible_cpus;
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@ -17,6 +17,7 @@
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#include <linux/delay.h>
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#include <linux/uaccess.h>
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#include <linux/percpu.h>
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#include <linux/mm.h>
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#include <asm/apic.h>
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@ -125,7 +126,9 @@ void __cpuinit irq_ctx_init(int cpu)
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if (per_cpu(hardirq_ctx, cpu))
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return;
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irqctx = (union irq_ctx *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER);
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irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),
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THREAD_FLAGS,
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THREAD_ORDER));
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irqctx->tinfo.task = NULL;
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irqctx->tinfo.exec_domain = NULL;
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irqctx->tinfo.cpu = cpu;
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@ -134,7 +137,9 @@ void __cpuinit irq_ctx_init(int cpu)
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per_cpu(hardirq_ctx, cpu) = irqctx;
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irqctx = (union irq_ctx *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER);
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irqctx = page_address(alloc_pages_node(cpu_to_node(cpu),
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THREAD_FLAGS,
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THREAD_ORDER));
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irqctx->tinfo.task = NULL;
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irqctx->tinfo.exec_domain = NULL;
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irqctx->tinfo.cpu = cpu;
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@ -178,11 +178,8 @@ static void * __init early_node_mem(int nodeid, unsigned long start,
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/* extend the search scope */
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end = max_pfn_mapped << PAGE_SHIFT;
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if (end > (MAX_DMA32_PFN<<PAGE_SHIFT))
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start = MAX_DMA32_PFN<<PAGE_SHIFT;
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else
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start = MAX_DMA_PFN<<PAGE_SHIFT;
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mem = memblock_x86_find_in_range_node(nodeid, start, end, size, align);
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start = MAX_DMA_PFN << PAGE_SHIFT;
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mem = memblock_find_in_range(start, end, size, align);
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if (mem != MEMBLOCK_ERROR)
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return __va(mem);
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