staging: dwc2: Make dwc2_hw_params.host_channels large enough

The hardware offers a 4-bit register containing the number of host
channels. However, the values of these register mean 1-16 host channels,
not 0-15. Since the dwc2_hw_params struct stores the actual number of
host channels supported instead of the raw register value, it should be
5 bits wide instead of 4.

Before this commit, hardware with 16 host channels would overflow the
field, making it appear as 0 channels.

This bug was introduced in commit 9badec2 (staging: dwc2: interpret all
hwcfg and related register at init time).

Reported-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Matthijs Kooijman 2013-10-03 09:46:25 +02:00 committed by Greg Kroah-Hartman
parent ab06e0f20e
commit 2d1155478f

View File

@ -294,7 +294,7 @@ struct dwc2_hw_params {
unsigned dev_token_q_depth:5;
unsigned max_transfer_size:26;
unsigned max_packet_count:11;
unsigned host_channels:4;
unsigned host_channels:5;
unsigned hs_phy_type:2;
unsigned fs_phy_type:2;
unsigned i2c_enable:1;