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https://github.com/FEX-Emu/linux.git
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Merge branch 'topic/pl330' into for-linus
This commit is contained in:
Vinod Koul
commit
2e76eba5e0
@ -443,7 +443,10 @@ struct dma_pl330_chan {
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/* For D-to-M and M-to-D channels */
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int burst_sz; /* the peripheral fifo width */
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int burst_len; /* the number of burst */
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dma_addr_t fifo_addr;
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phys_addr_t fifo_addr;
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/* DMA-mapped view of the FIFO; may differ if an IOMMU is present */
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dma_addr_t fifo_dma;
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enum dma_data_direction dir;
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/* for cyclic capability */
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bool cyclic;
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@ -538,11 +541,6 @@ struct _xfer_spec {
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struct dma_pl330_desc *desc;
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};
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static inline bool _queue_empty(struct pl330_thread *thrd)
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{
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return thrd->req[0].desc == NULL && thrd->req[1].desc == NULL;
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}
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static inline bool _queue_full(struct pl330_thread *thrd)
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{
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return thrd->req[0].desc != NULL && thrd->req[1].desc != NULL;
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@ -564,23 +562,6 @@ static inline u32 get_revision(u32 periph_id)
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return (periph_id >> PERIPH_REV_SHIFT) & PERIPH_REV_MASK;
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}
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static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[],
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enum pl330_dst da, u16 val)
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{
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if (dry_run)
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return SZ_DMAADDH;
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buf[0] = CMD_DMAADDH;
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buf[0] |= (da << 1);
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buf[1] = val;
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buf[2] = val >> 8;
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PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n",
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da == 1 ? "DA" : "SA", val);
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return SZ_DMAADDH;
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}
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static inline u32 _emit_END(unsigned dry_run, u8 buf[])
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{
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if (dry_run)
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@ -738,18 +719,6 @@ static inline u32 _emit_MOV(unsigned dry_run, u8 buf[],
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return SZ_DMAMOV;
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}
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static inline u32 _emit_NOP(unsigned dry_run, u8 buf[])
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{
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if (dry_run)
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return SZ_DMANOP;
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buf[0] = CMD_DMANOP;
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PL330_DBGCMD_DUMP(SZ_DMANOP, "\tDMANOP\n");
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return SZ_DMANOP;
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}
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static inline u32 _emit_RMB(unsigned dry_run, u8 buf[])
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{
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if (dry_run)
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@ -817,39 +786,6 @@ static inline u32 _emit_STP(unsigned dry_run, u8 buf[],
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return SZ_DMASTP;
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}
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static inline u32 _emit_STZ(unsigned dry_run, u8 buf[])
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{
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if (dry_run)
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return SZ_DMASTZ;
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buf[0] = CMD_DMASTZ;
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PL330_DBGCMD_DUMP(SZ_DMASTZ, "\tDMASTZ\n");
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return SZ_DMASTZ;
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}
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static inline u32 _emit_WFE(unsigned dry_run, u8 buf[], u8 ev,
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unsigned invalidate)
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{
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if (dry_run)
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return SZ_DMAWFE;
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buf[0] = CMD_DMAWFE;
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ev &= 0x1f;
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ev <<= 3;
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buf[1] = ev;
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if (invalidate)
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buf[1] |= (1 << 1);
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PL330_DBGCMD_DUMP(SZ_DMAWFE, "\tDMAWFE %u%s\n",
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ev >> 3, invalidate ? ", I" : "");
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return SZ_DMAWFE;
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}
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static inline u32 _emit_WFP(unsigned dry_run, u8 buf[],
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enum pl330_cond cond, u8 peri)
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{
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@ -2120,11 +2056,60 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan)
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return 1;
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}
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/*
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* We need the data direction between the DMAC (the dma-mapping "device") and
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* the FIFO (the dmaengine "dev"), from the FIFO's point of view. Confusing!
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*/
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static enum dma_data_direction
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pl330_dma_slave_map_dir(enum dma_transfer_direction dir)
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{
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switch (dir) {
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case DMA_MEM_TO_DEV:
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return DMA_FROM_DEVICE;
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case DMA_DEV_TO_MEM:
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return DMA_TO_DEVICE;
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case DMA_DEV_TO_DEV:
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return DMA_BIDIRECTIONAL;
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default:
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return DMA_NONE;
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}
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}
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static void pl330_unprep_slave_fifo(struct dma_pl330_chan *pch)
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{
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if (pch->dir != DMA_NONE)
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dma_unmap_resource(pch->chan.device->dev, pch->fifo_dma,
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1 << pch->burst_sz, pch->dir, 0);
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pch->dir = DMA_NONE;
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}
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static bool pl330_prep_slave_fifo(struct dma_pl330_chan *pch,
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enum dma_transfer_direction dir)
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{
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struct device *dev = pch->chan.device->dev;
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enum dma_data_direction dma_dir = pl330_dma_slave_map_dir(dir);
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/* Already mapped for this config? */
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if (pch->dir == dma_dir)
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return true;
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pl330_unprep_slave_fifo(pch);
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pch->fifo_dma = dma_map_resource(dev, pch->fifo_addr,
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1 << pch->burst_sz, dma_dir, 0);
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if (dma_mapping_error(dev, pch->fifo_dma))
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return false;
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pch->dir = dma_dir;
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return true;
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}
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static int pl330_config(struct dma_chan *chan,
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struct dma_slave_config *slave_config)
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{
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struct dma_pl330_chan *pch = to_pchan(chan);
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pl330_unprep_slave_fifo(pch);
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if (slave_config->direction == DMA_MEM_TO_DEV) {
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if (slave_config->dst_addr)
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pch->fifo_addr = slave_config->dst_addr;
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@ -2235,6 +2220,7 @@ static void pl330_free_chan_resources(struct dma_chan *chan)
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spin_unlock_irqrestore(&pl330->lock, flags);
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pm_runtime_mark_last_busy(pch->dmac->ddma.dev);
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pm_runtime_put_autosuspend(pch->dmac->ddma.dev);
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pl330_unprep_slave_fifo(pch);
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}
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static int pl330_get_current_xferred_count(struct dma_pl330_chan *pch,
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@ -2564,6 +2550,9 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
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return NULL;
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}
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if (!pl330_prep_slave_fifo(pch, direction))
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return NULL;
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for (i = 0; i < len / period_len; i++) {
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desc = pl330_get_desc(pch);
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if (!desc) {
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@ -2593,12 +2582,12 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
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desc->rqcfg.src_inc = 1;
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desc->rqcfg.dst_inc = 0;
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src = dma_addr;
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dst = pch->fifo_addr;
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dst = pch->fifo_dma;
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break;
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case DMA_DEV_TO_MEM:
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desc->rqcfg.src_inc = 0;
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desc->rqcfg.dst_inc = 1;
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src = pch->fifo_addr;
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src = pch->fifo_dma;
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dst = dma_addr;
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break;
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default:
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@ -2711,12 +2700,12 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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struct dma_pl330_chan *pch = to_pchan(chan);
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struct scatterlist *sg;
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int i;
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dma_addr_t addr;
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if (unlikely(!pch || !sgl || !sg_len))
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return NULL;
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addr = pch->fifo_addr;
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if (!pl330_prep_slave_fifo(pch, direction))
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return NULL;
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first = NULL;
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@ -2742,13 +2731,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
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if (direction == DMA_MEM_TO_DEV) {
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desc->rqcfg.src_inc = 1;
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desc->rqcfg.dst_inc = 0;
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fill_px(&desc->px,
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addr, sg_dma_address(sg), sg_dma_len(sg));
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fill_px(&desc->px, pch->fifo_dma, sg_dma_address(sg),
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sg_dma_len(sg));
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} else {
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desc->rqcfg.src_inc = 0;
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desc->rqcfg.dst_inc = 1;
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fill_px(&desc->px,
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sg_dma_address(sg), addr, sg_dma_len(sg));
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fill_px(&desc->px, sg_dma_address(sg), pch->fifo_dma,
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sg_dma_len(sg));
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}
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desc->rqcfg.brst_size = pch->burst_sz;
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@ -2906,6 +2895,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
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pch->thread = NULL;
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pch->chan.device = pd;
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pch->dmac = pl330;
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pch->dir = DMA_NONE;
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/* Add the channel to the DMAC list */
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list_add_tail(&pch->chan.device_node, &pd->channels);
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