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mtd: nand: omap: handle gpmc bch[48]
gpmc-nand bch registers are now available in driver, make use of it to handle bch[48] instead of relying on gpmc exported functions. And so nand driver no longer needs gpmc header, remove it. Signed-off-by: Afzal Mohammed <afzal@ti.com>
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Afzal Mohammed
parent
2fdf0c9896
commit
2ef9f3ddec
@ -28,7 +28,6 @@
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#endif
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#include <plat/dma.h>
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#include <plat/gpmc.h>
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#include <linux/platform_data/mtd-nand-omap2.h>
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#define DRIVER_NAME "omap2-nand"
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@ -106,6 +105,7 @@
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#define CS_MASK 0x7
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#define ENABLE_PREFETCH (0x1 << 7)
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#define DMA_MPU_MODE_SHIFT 2
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#define ECCSIZE0_SHIFT 12
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#define ECCSIZE1_SHIFT 22
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#define ECC1RESULTSIZE 0x1
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#define ECCCLEAR 0x100
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@ -1034,19 +1034,45 @@ static int omap_dev_ready(struct mtd_info *mtd)
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static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
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{
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int nerrors;
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unsigned int dev_width;
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unsigned int dev_width, nsectors;
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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struct nand_chip *chip = mtd->priv;
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u32 val;
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nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
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dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
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nsectors = 1;
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/*
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* Program GPMC to perform correction on one 512-byte sector at a time.
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* Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible and
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* gives a slight (5%) performance gain (but requires additional code).
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*/
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(void)gpmc_enable_hwecc_bch(info->gpmc_cs, mode, dev_width, 1, nerrors);
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writel(ECC1, info->reg.gpmc_ecc_control);
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/*
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* When using BCH, sector size is hardcoded to 512 bytes.
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* Here we are using wrapping mode 6 both for reading and writing, with:
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* size0 = 0 (no additional protected byte in spare area)
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* size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
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*/
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val = (32 << ECCSIZE1_SHIFT) | (0 << ECCSIZE0_SHIFT);
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writel(val, info->reg.gpmc_ecc_size_config);
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/* BCH configuration */
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val = ((1 << 16) | /* enable BCH */
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(((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
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(0x06 << 8) | /* wrap mode = 6 */
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(dev_width << 7) | /* bus width */
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(((nsectors-1) & 0x7) << 4) | /* number of sectors */
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(info->gpmc_cs << 1) | /* ECC CS */
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(0x1)); /* enable ECC */
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writel(val, info->reg.gpmc_ecc_config);
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/* clear ecc and enable bits */
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writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
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}
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/**
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@ -1060,7 +1086,32 @@ static int omap3_calculate_ecc_bch4(struct mtd_info *mtd, const u_char *dat,
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{
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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return gpmc_calculate_ecc_bch4(info->gpmc_cs, dat, ecc_code);
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unsigned long nsectors, val1, val2;
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int i;
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nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
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for (i = 0; i < nsectors; i++) {
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/* Read hw-computed remainder */
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val1 = readl(info->reg.gpmc_bch_result0[i]);
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val2 = readl(info->reg.gpmc_bch_result1[i]);
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/*
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* Add constant polynomial to remainder, in order to get an ecc
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* sequence of 0xFFs for a buffer filled with 0xFFs; and
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* left-justify the resulting polynomial.
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*/
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*ecc_code++ = 0x28 ^ ((val2 >> 12) & 0xFF);
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*ecc_code++ = 0x13 ^ ((val2 >> 4) & 0xFF);
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*ecc_code++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
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*ecc_code++ = 0x39 ^ ((val1 >> 20) & 0xFF);
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*ecc_code++ = 0x96 ^ ((val1 >> 12) & 0xFF);
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*ecc_code++ = 0xac ^ ((val1 >> 4) & 0xFF);
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*ecc_code++ = 0x7f ^ ((val1 & 0xF) << 4);
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}
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return 0;
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}
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/**
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@ -1074,7 +1125,39 @@ static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,
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{
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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return gpmc_calculate_ecc_bch8(info->gpmc_cs, dat, ecc_code);
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unsigned long nsectors, val1, val2, val3, val4;
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int i;
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nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
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for (i = 0; i < nsectors; i++) {
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/* Read hw-computed remainder */
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val1 = readl(info->reg.gpmc_bch_result0[i]);
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val2 = readl(info->reg.gpmc_bch_result1[i]);
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val3 = readl(info->reg.gpmc_bch_result2[i]);
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val4 = readl(info->reg.gpmc_bch_result3[i]);
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/*
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* Add constant polynomial to remainder, in order to get an ecc
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* sequence of 0xFFs for a buffer filled with 0xFFs.
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*/
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*ecc_code++ = 0xef ^ (val4 & 0xFF);
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*ecc_code++ = 0x51 ^ ((val3 >> 24) & 0xFF);
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*ecc_code++ = 0x2e ^ ((val3 >> 16) & 0xFF);
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*ecc_code++ = 0x09 ^ ((val3 >> 8) & 0xFF);
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*ecc_code++ = 0xed ^ (val3 & 0xFF);
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*ecc_code++ = 0x93 ^ ((val2 >> 24) & 0xFF);
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*ecc_code++ = 0x9a ^ ((val2 >> 16) & 0xFF);
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*ecc_code++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
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*ecc_code++ = 0x97 ^ (val2 & 0xFF);
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*ecc_code++ = 0x79 ^ ((val1 >> 24) & 0xFF);
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*ecc_code++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
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*ecc_code++ = 0x24 ^ ((val1 >> 8) & 0xFF);
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*ecc_code++ = 0xb5 ^ (val1 & 0xFF);
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}
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return 0;
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}
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/**
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@ -1130,7 +1213,7 @@ static void omap3_free_bch(struct mtd_info *mtd)
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*/
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static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
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{
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int ret, max_errors;
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int max_errors;
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struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
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mtd);
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#ifdef CONFIG_MTD_NAND_OMAP_BCH8
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@ -1147,11 +1230,6 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
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goto fail;
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}
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/* initialize GPMC BCH engine */
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ret = gpmc_init_hwecc_bch(info->gpmc_cs, 1, max_errors);
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if (ret)
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goto fail;
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/* software bch library is only used to detect and locate errors */
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info->bch = init_bch(13, max_errors, 0x201b /* hw polynomial */);
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if (!info->bch)
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