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rtc: rtc-s3c: Updates driver for S3C64XX and newer SoCs

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This Patch does followings.
1) Enables support for alarm and time tick pending register
   for periodic interrupt generation.
2) Changes writeb to writew beacuse the macro S3C64XX_RTCCON_TICEN
   (Tick Timer Enable) is 9th bit of register.
3) Changes writeb to writel as max_user_freq used in s3c64xx is 32768 and
   requires 15 bits to update the Tick Count Register.

Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com>
Signed-off-by: Taekgyun Ko <taeggyun.ko@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Atul Dahiya 2010-07-20 16:02:51 +05:30 committed by Kukjin Kim
parent 002d31e6b6
commit 2f3478f657
1 changed files with 10 additions and 2 deletions
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12
drivers/rtc/rtc-s3c.c
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@ -57,6 +57,10 @@ static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
struct rtc_device *rdev = id;
rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
if (s3c_rtc_cpu_type == TYPE_S3C64XX)
writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
return IRQ_HANDLED;
}
@ -65,6 +69,10 @@ static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
struct rtc_device *rdev = id;
rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
if (s3c_rtc_cpu_type == TYPE_S3C64XX)
writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
return IRQ_HANDLED;
}
@ -98,7 +106,7 @@ static int s3c_rtc_setpie(struct device *dev, int enabled)
if (enabled)
tmp |= S3C64XX_RTCCON_TICEN;
writeb(tmp, s3c_rtc_base + S3C2410_RTCCON);
writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
} else {
tmp = readb(s3c_rtc_base + S3C2410_TICNT);
tmp &= ~S3C2410_TICNT_ENABLE;
@ -132,7 +140,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
tmp |= (rtc_dev->max_user_freq / freq)-1;
writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
writel(tmp, s3c_rtc_base + S3C2410_TICNT);
spin_unlock_irq(&s3c_rtc_pie_lock);
return 0;