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ASoC: tegra: Use common DAI DMA data struct
Use the common DAI DMA data struct for tegra, this allows us to use the common helper function to configure the DMA slave config based on the DAI DMA data. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
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09ae3aaf3c
commit
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@ -35,6 +35,7 @@
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#include <sound/pcm.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#include "tegra_asoc_utils.h"
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#include "tegra_asoc_utils.h"
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#include "tegra20_ac97.h"
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#include "tegra20_ac97.h"
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@ -389,14 +390,14 @@ static int tegra20_ac97_platform_probe(struct platform_device *pdev)
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}
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}
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ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;
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ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;
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ac97->capture_dma_data.wrap = 4;
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ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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ac97->capture_dma_data.width = 32;
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ac97->capture_dma_data.maxburst = 4;
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ac97->capture_dma_data.req_sel = of_dma[1];
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ac97->capture_dma_data.slave_id = of_dma[1];
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ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;
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ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;
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ac97->playback_dma_data.wrap = 4;
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ac97->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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ac97->playback_dma_data.width = 32;
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ac97->capture_dma_data.maxburst = 4;
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ac97->playback_dma_data.req_sel = of_dma[1];
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ac97->capture_dma_data.slave_id = of_dma[0];
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ret = snd_soc_register_dais(&pdev->dev, &tegra20_ac97_dai, 1);
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ret = snd_soc_register_dais(&pdev->dev, &tegra20_ac97_dai, 1);
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if (ret) {
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if (ret) {
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@ -85,8 +85,8 @@
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struct tegra20_ac97 {
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struct tegra20_ac97 {
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struct clk *clk_ac97;
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struct clk *clk_ac97;
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struct tegra_pcm_dma_params capture_dma_data;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct tegra_pcm_dma_params playback_dma_data;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct regmap *regmap;
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struct regmap *regmap;
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int reset_gpio;
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int reset_gpio;
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int sync_gpio;
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int sync_gpio;
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@ -41,6 +41,7 @@
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#include <sound/pcm.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#include "tegra20_i2s.h"
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#include "tegra20_i2s.h"
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@ -403,14 +404,14 @@ static int tegra20_i2s_platform_probe(struct platform_device *pdev)
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}
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}
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i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
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i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
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i2s->capture_dma_data.wrap = 4;
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.width = 32;
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i2s->capture_dma_data.maxburst = 4;
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i2s->capture_dma_data.req_sel = dma_ch;
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i2s->capture_dma_data.slave_id = dma_ch;
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i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
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i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
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i2s->playback_dma_data.wrap = 4;
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.width = 32;
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i2s->playback_dma_data.maxburst = 4;
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i2s->playback_dma_data.req_sel = dma_ch;
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i2s->playback_dma_data.slave_id = dma_ch;
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pm_runtime_enable(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev)) {
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if (!pm_runtime_enabled(&pdev->dev)) {
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@ -155,8 +155,8 @@
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struct tegra20_i2s {
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struct tegra20_i2s {
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struct snd_soc_dai_driver dai;
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struct snd_soc_dai_driver dai;
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struct clk *clk_i2s;
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struct clk *clk_i2s;
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struct tegra_pcm_dma_params capture_dma_data;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct tegra_pcm_dma_params playback_dma_data;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct regmap *regmap;
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struct regmap *regmap;
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};
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};
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@ -32,6 +32,7 @@
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#include <sound/pcm.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#include "tegra20_spdif.h"
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#include "tegra20_spdif.h"
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@ -318,9 +319,9 @@ static int tegra20_spdif_platform_probe(struct platform_device *pdev)
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}
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}
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spdif->playback_dma_data.addr = mem->start + TEGRA20_SPDIF_DATA_OUT;
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spdif->playback_dma_data.addr = mem->start + TEGRA20_SPDIF_DATA_OUT;
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spdif->playback_dma_data.wrap = 4;
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spdif->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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spdif->playback_dma_data.width = 32;
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spdif->capture_dma_data.maxburst = 4;
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spdif->playback_dma_data.req_sel = dmareq->start;
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spdif->playback_dma_data.slave_id = dmareq->start;
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pm_runtime_enable(&pdev->dev);
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pm_runtime_enable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev)) {
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if (!pm_runtime_enabled(&pdev->dev)) {
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@ -462,8 +462,8 @@
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struct tegra20_spdif {
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struct tegra20_spdif {
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struct clk *clk_spdif_out;
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struct clk *clk_spdif_out;
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struct tegra_pcm_dma_params capture_dma_data;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct tegra_pcm_dma_params playback_dma_data;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct regmap *regmap;
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struct regmap *regmap;
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};
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};
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@ -95,8 +95,8 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
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}
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}
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int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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unsigned long *fiforeg,
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dma_addr_t *fiforeg,
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unsigned long *reqsel)
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unsigned int *reqsel)
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{
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{
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int channel;
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int channel;
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u32 reg, val;
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u32 reg, val;
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@ -178,8 +178,8 @@ int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif)
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EXPORT_SYMBOL_GPL(tegra30_ahub_free_rx_fifo);
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EXPORT_SYMBOL_GPL(tegra30_ahub_free_rx_fifo);
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int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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unsigned long *fiforeg,
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dma_addr_t *fiforeg,
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unsigned long *reqsel)
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unsigned int *reqsel)
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{
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{
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int channel;
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int channel;
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u32 reg, val;
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u32 reg, val;
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@ -451,15 +451,15 @@ enum tegra30_ahub_rxcif {
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};
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};
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extern int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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extern int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
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unsigned long *fiforeg,
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dma_addr_t *fiforeg,
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unsigned long *reqsel);
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unsigned int *reqsel);
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extern int tegra30_ahub_enable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_enable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_disable_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif);
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extern int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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extern int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
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unsigned long *fiforeg,
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dma_addr_t *fiforeg,
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unsigned long *reqsel);
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unsigned int *reqsel);
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extern int tegra30_ahub_enable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_enable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_disable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_disable_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_free_tx_fifo(enum tegra30_ahub_txcif txcif);
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extern int tegra30_ahub_free_tx_fifo(enum tegra30_ahub_txcif txcif);
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@ -38,6 +38,7 @@
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#include <sound/pcm.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#include "tegra30_ahub.h"
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#include "tegra30_ahub.h"
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#include "tegra30_i2s.h"
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#include "tegra30_i2s.h"
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@ -80,17 +81,17 @@ static int tegra30_i2s_startup(struct snd_pcm_substream *substream,
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
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ret = tegra30_ahub_allocate_tx_fifo(&i2s->playback_fifo_cif,
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&i2s->playback_dma_data.addr,
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&i2s->playback_dma_data.addr,
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&i2s->playback_dma_data.req_sel);
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&i2s->playback_dma_data.slave_id);
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i2s->playback_dma_data.wrap = 4;
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.width = 32;
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i2s->playback_dma_data.maxburst = 4;
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tegra30_ahub_set_rx_cif_source(i2s->playback_i2s_cif,
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tegra30_ahub_set_rx_cif_source(i2s->playback_i2s_cif,
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i2s->playback_fifo_cif);
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i2s->playback_fifo_cif);
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} else {
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} else {
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ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
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ret = tegra30_ahub_allocate_rx_fifo(&i2s->capture_fifo_cif,
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&i2s->capture_dma_data.addr,
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&i2s->capture_dma_data.addr,
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&i2s->capture_dma_data.req_sel);
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&i2s->capture_dma_data.slave_id);
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i2s->capture_dma_data.wrap = 4;
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.width = 32;
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i2s->capture_dma_data.maxburst = 4;
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tegra30_ahub_set_rx_cif_source(i2s->capture_fifo_cif,
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tegra30_ahub_set_rx_cif_source(i2s->capture_fifo_cif,
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i2s->capture_i2s_cif);
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i2s->capture_i2s_cif);
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}
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}
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@ -231,10 +231,10 @@ struct tegra30_i2s {
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struct clk *clk_i2s;
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struct clk *clk_i2s;
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enum tegra30_ahub_txcif capture_i2s_cif;
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enum tegra30_ahub_txcif capture_i2s_cif;
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enum tegra30_ahub_rxcif capture_fifo_cif;
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enum tegra30_ahub_rxcif capture_fifo_cif;
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struct tegra_pcm_dma_params capture_dma_data;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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enum tegra30_ahub_rxcif playback_i2s_cif;
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enum tegra30_ahub_rxcif playback_i2s_cif;
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enum tegra30_ahub_txcif playback_fifo_cif;
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enum tegra30_ahub_txcif playback_fifo_cif;
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struct tegra_pcm_dma_params playback_dma_data;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct regmap *regmap;
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struct regmap *regmap;
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};
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};
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@ -81,12 +81,9 @@ static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct device *dev = rtd->platform->dev;
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struct device *dev = rtd->platform->dev;
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struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
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struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
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struct tegra_pcm_dma_params *dmap;
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struct dma_slave_config slave_config;
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struct dma_slave_config slave_config;
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int ret;
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int ret;
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dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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ret = snd_hwparams_to_dma_slave_config(substream, params,
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ret = snd_hwparams_to_dma_slave_config(substream, params,
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&slave_config);
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&slave_config);
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if (ret) {
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if (ret) {
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@ -94,16 +91,9 @@ static int tegra_pcm_hw_params(struct snd_pcm_substream *substream,
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return ret;
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return ret;
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}
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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snd_dmaengine_pcm_set_config_from_dai_data(substream,
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slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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snd_soc_dai_get_dma_data(rtd->cpu_dai, substream),
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slave_config.dst_addr = dmap->addr;
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&slave_config);
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slave_config.dst_maxburst = 4;
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} else {
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slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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slave_config.src_addr = dmap->addr;
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slave_config.src_maxburst = 4;
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}
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slave_config.slave_id = dmap->req_sel;
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ret = dmaengine_slave_config(chan, &slave_config);
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ret = dmaengine_slave_config(chan, &slave_config);
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if (ret < 0) {
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if (ret < 0) {
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@ -31,13 +31,6 @@
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#ifndef __TEGRA_PCM_H__
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#ifndef __TEGRA_PCM_H__
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#define __TEGRA_PCM_H__
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#define __TEGRA_PCM_H__
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struct tegra_pcm_dma_params {
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unsigned long addr;
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unsigned long wrap;
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unsigned long width;
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unsigned long req_sel;
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};
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int tegra_pcm_platform_register(struct device *dev);
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int tegra_pcm_platform_register(struct device *dev);
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void tegra_pcm_platform_unregister(struct device *dev);
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void tegra_pcm_platform_unregister(struct device *dev);
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