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Merge branch 'for-linus-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
* 'for-linus-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68k: use kernel processor defines for conditional optimizations m68knommu: create config options for CPU classes m68knommu: fix linker script exported name sections
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commit
3a2289a4a3
@ -14,6 +14,33 @@ config GENERIC_CLOCKEVENTS
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bool
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default n
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config M68000
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bool
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help
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The Freescale (was Motorola) 68000 CPU is the first generation of
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the well known M68K family of processors. The CPU core as well as
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being available as a stand alone CPU was also used in many
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System-On-Chip devices (eg 68328, 68302, etc). It does not contain
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a paging MMU.
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config MCPU32
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bool
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help
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The Freescale (was then Motorola) CPU32 is a CPU core that is
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based on the 68020 processor. For the most part it is used in
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System-On-Chip parts, and does not contain a paging MMU.
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config COLDFIRE
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bool
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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help
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The Freescale ColdFire family of processors is a modern derivitive
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of the 68000 processor family. They are mainly targeted at embedded
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applications, and are all System-On-Chip (SOC) devices, as opposed
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to stand alone CPUs. They implement a subset of the original 68000
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processor instruction set.
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config COLDFIRE_SW_A7
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bool
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default n
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@ -36,26 +63,31 @@ choice
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config M68328
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bool "MC68328"
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select M68000
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help
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Motorola 68328 processor support.
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config M68EZ328
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bool "MC68EZ328"
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select M68000
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help
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Motorola 68EX328 processor support.
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config M68VZ328
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bool "MC68VZ328"
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select M68000
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help
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Motorola 68VZ328 processor support.
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config M68360
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bool "MC68360"
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select MCPU32
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help
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Motorola 68360 processor support.
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config M5206
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bool "MCF5206"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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@ -63,6 +95,7 @@ config M5206
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config M5206e
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bool "MCF5206e"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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@ -70,6 +103,7 @@ config M5206e
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config M520x
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bool "MCF520x"
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select COLDFIRE
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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help
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@ -77,6 +111,7 @@ config M520x
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config M523x
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bool "MCF523x"
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select COLDFIRE
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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@ -85,6 +120,7 @@ config M523x
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config M5249
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bool "MCF5249"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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@ -92,6 +128,7 @@ config M5249
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config M5271
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bool "MCF5271"
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select COLDFIRE
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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@ -99,6 +136,7 @@ config M5271
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config M5272
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bool "MCF5272"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_MBAR
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help
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@ -106,6 +144,7 @@ config M5272
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config M5275
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bool "MCF5275"
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select COLDFIRE
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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help
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@ -113,6 +152,7 @@ config M5275
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config M528x
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bool "MCF528x"
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select COLDFIRE
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select GENERIC_CLOCKEVENTS
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select HAVE_CACHE_SPLIT
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select HAVE_IPSBAR
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@ -121,6 +161,7 @@ config M528x
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config M5307
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bool "MCF5307"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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select HAVE_MBAR
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@ -129,12 +170,14 @@ config M5307
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config M532x
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bool "MCF532x"
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select COLDFIRE
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select HAVE_CACHE_CB
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help
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Freescale (Motorola) ColdFire 532x processor support.
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config M5407
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bool "MCF5407"
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select COLDFIRE
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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select HAVE_MBAR
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@ -143,6 +186,7 @@ config M5407
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config M547x
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bool "MCF547x"
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select COLDFIRE
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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@ -150,6 +194,7 @@ config M547x
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config M548x
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bool "MCF548x"
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select COLDFIRE
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select HAVE_CACHE_CB
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select HAVE_MBAR
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help
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@ -168,13 +213,6 @@ config M54xx
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depends on (M548x || M547x)
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default y
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config COLDFIRE
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bool
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depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx)
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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default y
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config CLOCK_SET
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bool "Enable setting the CPU clock frequency"
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default n
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@ -14,8 +14,7 @@ EXPORT_SYMBOL(__ashrdi3);
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EXPORT_SYMBOL(__lshrdi3);
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EXPORT_SYMBOL(__muldi3);
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#if !defined(__mc68020__) && !defined(__mc68030__) && \
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!defined(__mc68040__) && !defined(__mc68060__) && !defined(__mcpu32__)
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#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
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/*
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* Simpler 68k and ColdFire parts also need a few other gcc functions.
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*/
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@ -84,52 +84,52 @@ SECTIONS {
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/* Kernel symbol table: Normal symbols */
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. = ALIGN(4);
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__start___ksymtab = .;
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*(__ksymtab)
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*(SORT(___ksymtab+*))
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__stop___ksymtab = .;
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/* Kernel symbol table: GPL-only symbols */
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__start___ksymtab_gpl = .;
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*(__ksymtab_gpl)
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*(SORT(___ksymtab_gpl+*))
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__stop___ksymtab_gpl = .;
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/* Kernel symbol table: Normal unused symbols */
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__start___ksymtab_unused = .;
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*(__ksymtab_unused)
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*(SORT(___ksymtab_unused+*))
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__stop___ksymtab_unused = .;
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/* Kernel symbol table: GPL-only unused symbols */
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__start___ksymtab_unused_gpl = .;
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*(__ksymtab_unused_gpl)
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*(SORT(___ksymtab_unused_gpl+*))
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__stop___ksymtab_unused_gpl = .;
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/* Kernel symbol table: GPL-future symbols */
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__start___ksymtab_gpl_future = .;
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*(__ksymtab_gpl_future)
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*(SORT(___ksymtab_gpl_future+*))
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__stop___ksymtab_gpl_future = .;
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/* Kernel symbol table: Normal symbols */
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__start___kcrctab = .;
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*(__kcrctab)
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*(SORT(___kcrctab+*))
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__stop___kcrctab = .;
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/* Kernel symbol table: GPL-only symbols */
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__start___kcrctab_gpl = .;
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*(__kcrctab_gpl)
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*(SORT(___kcrctab_gpl+*))
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__stop___kcrctab_gpl = .;
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/* Kernel symbol table: Normal unused symbols */
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__start___kcrctab_unused = .;
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*(__kcrctab_unused)
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*(SORT(___kcrctab_unused+*))
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__stop___kcrctab_unused = .;
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/* Kernel symbol table: GPL-only unused symbols */
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__start___kcrctab_unused_gpl = .;
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*(__kcrctab_unused_gpl)
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*(SORT(___kcrctab_unused_gpl+*))
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__stop___kcrctab_unused_gpl = .;
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/* Kernel symbol table: GPL-future symbols */
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__start___kcrctab_gpl_future = .;
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*(__kcrctab_gpl_future)
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*(SORT(___kcrctab_gpl_future+*))
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__stop___kcrctab_gpl_future = .;
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/* Kernel symbol table: strings */
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@ -34,8 +34,10 @@ void *memcpy(void *to, const void *from, size_t n)
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if (temp) {
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long *lto = to;
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const long *lfrom = from;
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#if defined(__mc68020__) || defined(__mc68030__) || \
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defined(__mc68040__) || defined(__mc68060__) || defined(__mcpu32__)
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#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
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for (; temp; temp--)
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*lto++ = *lfrom++;
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#else
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asm volatile (
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" movel %2,%3\n"
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" andw #7,%3\n"
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@ -56,9 +58,6 @@ void *memcpy(void *to, const void *from, size_t n)
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" jpl 4b"
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: "=a" (lfrom), "=a" (lto), "=d" (temp), "=&d" (temp1)
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: "0" (lfrom), "1" (lto), "2" (temp));
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#else
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for (; temp; temp--)
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*lto++ = *lfrom++;
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#endif
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to = lto;
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from = lfrom;
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@ -32,8 +32,10 @@ void *memset(void *s, int c, size_t count)
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temp = count >> 2;
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if (temp) {
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long *ls = s;
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#if defined(__mc68020__) || defined(__mc68030__) || \
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defined(__mc68040__) || defined(__mc68060__) || defined(__mcpu32__)
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#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
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for (; temp; temp--)
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*ls++ = c;
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#else
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size_t temp1;
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asm volatile (
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" movel %1,%2\n"
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@ -55,9 +57,6 @@ void *memset(void *s, int c, size_t count)
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" jpl 1b"
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: "=a" (ls), "=d" (temp), "=&d" (temp1)
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: "d" (c), "0" (ls), "1" (temp));
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#else
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for (; temp; temp--)
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*ls++ = c;
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#endif
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s = ls;
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}
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@ -19,17 +19,7 @@ along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#if defined(__mc68020__) || defined(__mc68030__) || \
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defined(__mc68040__) || defined(__mc68060__) || defined(__mcpu32__)
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#define umul_ppmm(w1, w0, u, v) \
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__asm__ ("mulu%.l %3,%1:%0" \
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: "=d" ((USItype)(w0)), \
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"=d" ((USItype)(w1)) \
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: "%0" ((USItype)(u)), \
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"dmi" ((USItype)(v)))
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#else
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#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
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#define SI_TYPE_SIZE 32
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#define __BITS4 (SI_TYPE_SIZE / 4)
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@ -61,6 +51,15 @@ Boston, MA 02111-1307, USA. */
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(w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
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} while (0)
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#else
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#define umul_ppmm(w1, w0, u, v) \
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__asm__ ("mulu%.l %3,%1:%0" \
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: "=d" ((USItype)(w0)), \
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"=d" ((USItype)(w1)) \
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: "%0" ((USItype)(u)), \
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"dmi" ((USItype)(v)))
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#endif
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#define __umulsidi3(u, v) \
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