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ASoC: OMAP: Add DSP_A mode support for mcbsp
DSP_A mode is similar to the DSP_B, but the MSB is delayed with one bclk (appears after the FS pulse and not under it). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -287,6 +287,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
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regs->srgr2 |= FPER(wlen * channels - 1);
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regs->srgr2 |= FPER(wlen * channels - 1);
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regs->srgr1 |= FWID(wlen - 1);
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regs->srgr1 |= FWID(wlen - 1);
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break;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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case SND_SOC_DAIFMT_DSP_B:
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case SND_SOC_DAIFMT_DSP_B:
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regs->srgr2 |= FPER(wlen * channels - 1);
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regs->srgr2 |= FPER(wlen * channels - 1);
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regs->srgr1 |= FWID(wlen * channels - 2);
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regs->srgr1 |= FWID(wlen * channels - 2);
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@ -330,6 +331,13 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
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regs->rcr2 |= RDATDLY(1);
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regs->rcr2 |= RDATDLY(1);
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regs->xcr2 |= XDATDLY(1);
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regs->xcr2 |= XDATDLY(1);
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break;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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/* 1-bit data delay */
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regs->rcr2 |= RDATDLY(1);
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regs->xcr2 |= XDATDLY(1);
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/* Invert FS polarity configuration */
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temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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case SND_SOC_DAIFMT_DSP_B:
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/* 0-bit data delay */
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/* 0-bit data delay */
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regs->rcr2 |= RDATDLY(0);
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regs->rcr2 |= RDATDLY(0);
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