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mfd: Turn on the twl4030-madc MADC clock
Without turning the MADC clock on, no MADC conversions occur. $ cat /sys/class/hwmon/hwmon0/device/in8_input [ 53.428436] twl4030_madc twl4030_madc: conversion timeout! cat: read error: Resource temporarily unavailable Signed-off-by: Kyle Manna <kyle@kylemanna.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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parent
881de67046
commit
3d6271f92e
@ -740,6 +740,28 @@ static int __devinit twl4030_madc_probe(struct platform_device *pdev)
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TWL4030_BCI_BCICTL1);
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goto err_i2c;
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}
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/* Check that MADC clock is on */
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ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, ®val, TWL4030_REG_GPBR1);
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if (ret) {
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dev_err(&pdev->dev, "unable to read reg GPBR1 0x%X\n",
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TWL4030_REG_GPBR1);
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goto err_i2c;
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}
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/* If MADC clk is not on, turn it on */
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if (!(regval & TWL4030_GPBR1_MADC_HFCLK_EN)) {
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dev_info(&pdev->dev, "clk disabled, enabling\n");
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regval |= TWL4030_GPBR1_MADC_HFCLK_EN;
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ret = twl_i2c_write_u8(TWL4030_MODULE_INTBR, regval,
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TWL4030_REG_GPBR1);
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if (ret) {
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dev_err(&pdev->dev, "unable to write reg GPBR1 0x%X\n",
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TWL4030_REG_GPBR1);
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goto err_i2c;
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}
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}
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platform_set_drvdata(pdev, madc);
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mutex_init(&madc->lock);
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ret = request_threaded_irq(platform_get_irq(pdev, 0), NULL,
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@ -129,6 +129,10 @@ enum sample_type {
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#define REG_BCICTL2 0x024
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#define TWL4030_BCI_ITHSENS 0x007
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/* Register and bits for GPBR1 register */
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#define TWL4030_REG_GPBR1 0x0c
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#define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)
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struct twl4030_madc_user_parms {
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int channel;
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int average;
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