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https://github.com/FEX-Emu/linux.git
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mfd: Commonize tps65910 regmap access through header
This change removes the read/write callback functions in favor of common regmap accessors inside the header file. This change also makes use of regmap_read/write for single register access which maps better onto what this driver actually needs. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Rhyland Klein
Samuel Ortiz
parent
7ccfe9b1d5
commit
3f7e82759c
@ -23,9 +23,9 @@
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static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset)
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{
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struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
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uint8_t val;
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unsigned int val;
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tps65910->read(tps65910, TPS65910_GPIO0 + offset, 1, &val);
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tps65910_reg_read(tps65910, TPS65910_GPIO0 + offset, &val);
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if (val & GPIO_STS_MASK)
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return 1;
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@ -39,10 +39,10 @@ static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset,
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struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
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if (value)
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tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,
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tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset,
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GPIO_SET_MASK);
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else
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tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,
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tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset,
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GPIO_SET_MASK);
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}
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@ -54,7 +54,7 @@ static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset,
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/* Set the initial value */
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tps65910_gpio_set(gc, offset, value);
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return tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset,
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return tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset,
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GPIO_CFG_MASK);
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}
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@ -62,7 +62,7 @@ static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset)
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{
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struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
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return tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset,
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return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset,
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GPIO_CFG_MASK);
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}
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@ -102,7 +102,7 @@ void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base)
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int i;
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for (i = 0; i < tps65910->gpio.ngpio; ++i) {
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if (board_data->en_gpio_sleep[i]) {
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ret = tps65910_set_bits(tps65910,
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ret = tps65910_reg_set_bits(tps65910,
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TPS65910_GPIO0 + i, GPIO_SLEEP_MASK);
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if (ret < 0)
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dev_warn(tps65910->dev,
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@ -41,28 +41,28 @@ static inline int irq_to_tps65910_irq(struct tps65910 *tps65910,
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static irqreturn_t tps65910_irq(int irq, void *irq_data)
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{
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struct tps65910 *tps65910 = irq_data;
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unsigned int reg;
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u32 irq_sts;
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u32 irq_mask;
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u8 reg;
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int i;
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tps65910->read(tps65910, TPS65910_INT_STS, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_STS, ®);
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irq_sts = reg;
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tps65910->read(tps65910, TPS65910_INT_STS2, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_STS2, ®);
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irq_sts |= reg << 8;
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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tps65910->read(tps65910, TPS65910_INT_STS3, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_STS3, ®);
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irq_sts |= reg << 16;
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}
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tps65910->read(tps65910, TPS65910_INT_MSK, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®);
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irq_mask = reg;
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tps65910->read(tps65910, TPS65910_INT_MSK2, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®);
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irq_mask |= reg << 8;
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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tps65910->read(tps65910, TPS65910_INT_MSK3, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®);
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irq_mask |= reg << 16;
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}
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@ -82,13 +82,13 @@ static irqreturn_t tps65910_irq(int irq, void *irq_data)
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/* Write the STS register back to clear IRQs we handled */
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reg = irq_sts & 0xFF;
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irq_sts >>= 8;
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tps65910->write(tps65910, TPS65910_INT_STS, 1, ®);
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tps65910_reg_write(tps65910, TPS65910_INT_STS, reg);
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reg = irq_sts & 0xFF;
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tps65910->write(tps65910, TPS65910_INT_STS2, 1, ®);
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tps65910_reg_write(tps65910, TPS65910_INT_STS2, reg);
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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reg = irq_sts >> 8;
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tps65910->write(tps65910, TPS65910_INT_STS3, 1, ®);
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tps65910_reg_write(tps65910, TPS65910_INT_STS3, reg);
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}
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return IRQ_HANDLED;
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@ -105,27 +105,27 @@ static void tps65910_irq_sync_unlock(struct irq_data *data)
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{
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struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
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u32 reg_mask;
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u8 reg;
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unsigned int reg;
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tps65910->read(tps65910, TPS65910_INT_MSK, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®);
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reg_mask = reg;
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tps65910->read(tps65910, TPS65910_INT_MSK2, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®);
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reg_mask |= reg << 8;
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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tps65910->read(tps65910, TPS65910_INT_MSK3, 1, ®);
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tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®);
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reg_mask |= reg << 16;
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}
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if (tps65910->irq_mask != reg_mask) {
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reg = tps65910->irq_mask & 0xFF;
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tps65910->write(tps65910, TPS65910_INT_MSK, 1, ®);
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tps65910_reg_write(tps65910, TPS65910_INT_MSK, reg);
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reg = tps65910->irq_mask >> 8 & 0xFF;
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tps65910->write(tps65910, TPS65910_INT_MSK2, 1, ®);
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tps65910_reg_write(tps65910, TPS65910_INT_MSK2, reg);
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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reg = tps65910->irq_mask >> 16;
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tps65910->write(tps65910, TPS65910_INT_MSK3, 1, ®);
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tps65910_reg_write(tps65910, TPS65910_INT_MSK3, reg);
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}
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}
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mutex_unlock(&tps65910->irq_lock);
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@ -37,30 +37,6 @@ static struct mfd_cell tps65910s[] = {
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};
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static int tps65910_i2c_read(struct tps65910 *tps65910, u8 reg,
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int bytes, void *dest)
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{
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return regmap_bulk_read(tps65910->regmap, reg, dest, bytes);
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}
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static int tps65910_i2c_write(struct tps65910 *tps65910, u8 reg,
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int bytes, void *src)
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{
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return regmap_bulk_write(tps65910->regmap, reg, src, bytes);
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}
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int tps65910_set_bits(struct tps65910 *tps65910, u8 reg, u8 mask)
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{
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return regmap_update_bits(tps65910->regmap, reg, mask, mask);
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}
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EXPORT_SYMBOL_GPL(tps65910_set_bits);
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int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask)
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{
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return regmap_update_bits(tps65910->regmap, reg, mask, 0);
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}
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EXPORT_SYMBOL_GPL(tps65910_clear_bits);
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static bool is_volatile_reg(struct device *dev, unsigned int reg)
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{
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struct tps65910 *tps65910 = dev_get_drvdata(dev);
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@ -102,7 +78,7 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
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return 0;
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/* enabling SLEEP device state */
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ret = tps65910_set_bits(tps65910, TPS65910_DEVCTRL,
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ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
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DEVCTRL_DEV_SLP_MASK);
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if (ret < 0) {
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dev_err(dev, "set dev_slp failed: %d\n", ret);
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@ -114,7 +90,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
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return 0;
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if (pmic_pdata->slp_keepon->therm_keepon) {
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ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON,
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ret = tps65910_reg_set_bits(tps65910,
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TPS65910_SLEEP_KEEP_RES_ON,
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SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK);
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if (ret < 0) {
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dev_err(dev, "set therm_keepon failed: %d\n", ret);
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@ -123,7 +100,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
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}
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if (pmic_pdata->slp_keepon->clkout32k_keepon) {
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ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON,
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ret = tps65910_reg_set_bits(tps65910,
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TPS65910_SLEEP_KEEP_RES_ON,
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SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);
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if (ret < 0) {
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dev_err(dev, "set clkout32k_keepon failed: %d\n", ret);
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@ -132,7 +110,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
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}
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if (pmic_pdata->slp_keepon->i2chs_keepon) {
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ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON,
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ret = tps65910_reg_set_bits(tps65910,
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TPS65910_SLEEP_KEEP_RES_ON,
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SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK);
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if (ret < 0) {
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dev_err(dev, "set i2chs_keepon failed: %d\n", ret);
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@ -143,7 +122,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
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return 0;
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disable_dev_slp:
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tps65910_clear_bits(tps65910, TPS65910_DEVCTRL, DEVCTRL_DEV_SLP_MASK);
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tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
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DEVCTRL_DEV_SLP_MASK);
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err_sleep_init:
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return ret;
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@ -176,8 +156,6 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c,
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tps65910->dev = &i2c->dev;
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tps65910->i2c_client = i2c;
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tps65910->id = id->driver_data;
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tps65910->read = tps65910_i2c_read;
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tps65910->write = tps65910_i2c_write;
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mutex_init(&tps65910->io_mutex);
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tps65910->regmap = regmap_init_i2c(i2c, &tps65910_regmap_config);
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@ -331,21 +331,16 @@ struct tps65910_reg {
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static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
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{
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u8 val;
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unsigned int val;
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int err;
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err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
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err = tps65910_reg_read(pmic->mfd, reg, &val);
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if (err)
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return err;
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return val;
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}
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static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
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{
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return pmic->mfd->write(pmic->mfd, reg, 1, &val);
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}
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static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
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u8 set_mask, u8 clear_mask)
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{
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@ -362,7 +357,7 @@ static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
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data &= ~clear_mask;
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data |= set_mask;
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err = tps65910_write(pmic, reg, data);
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err = tps65910_reg_write(pmic->mfd, reg, data);
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if (err)
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dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
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@ -371,7 +366,7 @@ out:
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return err;
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}
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static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
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static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
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{
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int data;
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@ -385,13 +380,13 @@ static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
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return data;
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}
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static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
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static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
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{
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int err;
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mutex_lock(&pmic->mutex);
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err = tps65910_write(pmic, reg, val);
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err = tps65910_reg_write(pmic->mfd, reg, val);
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if (err < 0)
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dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
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@ -476,7 +471,7 @@ static int tps65910_is_enabled(struct regulator_dev *dev)
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if (reg < 0)
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return reg;
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value = tps65910_reg_read(pmic, reg);
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value = tps65910_reg_read_locked(pmic, reg);
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if (value < 0)
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return value;
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@ -493,7 +488,7 @@ static int tps65910_enable(struct regulator_dev *dev)
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if (reg < 0)
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return reg;
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return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
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return tps65910_reg_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
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}
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static int tps65910_disable(struct regulator_dev *dev)
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@ -506,7 +501,7 @@ static int tps65910_disable(struct regulator_dev *dev)
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if (reg < 0)
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return reg;
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return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
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return tps65910_reg_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
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}
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static int tps65910_enable_time(struct regulator_dev *dev)
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@ -532,9 +527,9 @@ static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
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LDO_ST_MODE_BIT);
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case REGULATOR_MODE_IDLE:
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value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
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return tps65910_set_bits(mfd, reg, value);
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return tps65910_reg_set_bits(mfd, reg, value);
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case REGULATOR_MODE_STANDBY:
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return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
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return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
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}
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return -EINVAL;
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@ -549,7 +544,7 @@ static unsigned int tps65910_get_mode(struct regulator_dev *dev)
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if (reg < 0)
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return reg;
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value = tps65910_reg_read(pmic, reg);
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value = tps65910_reg_read_locked(pmic, reg);
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if (value < 0)
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return value;
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@ -569,28 +564,28 @@ static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
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switch (id) {
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case TPS65910_REG_VDD1:
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opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
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mult = tps65910_reg_read(pmic, TPS65910_VDD1);
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opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
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mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
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mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
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srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
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srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
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sr = opvsel & VDD1_OP_CMD_MASK;
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opvsel &= VDD1_OP_SEL_MASK;
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srvsel &= VDD1_SR_SEL_MASK;
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vselmax = 75;
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break;
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case TPS65910_REG_VDD2:
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opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
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mult = tps65910_reg_read(pmic, TPS65910_VDD2);
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opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
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mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
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mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
|
||||
srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
|
||||
srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
|
||||
sr = opvsel & VDD2_OP_CMD_MASK;
|
||||
opvsel &= VDD2_OP_SEL_MASK;
|
||||
srvsel &= VDD2_SR_SEL_MASK;
|
||||
vselmax = 75;
|
||||
break;
|
||||
case TPS65911_REG_VDDCTRL:
|
||||
opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
|
||||
srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
|
||||
opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
|
||||
srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
|
||||
sr = opvsel & VDDCTRL_OP_CMD_MASK;
|
||||
opvsel &= VDDCTRL_OP_SEL_MASK;
|
||||
srvsel &= VDDCTRL_SR_SEL_MASK;
|
||||
@ -630,7 +625,7 @@ static int tps65910_get_voltage(struct regulator_dev *dev)
|
||||
if (reg < 0)
|
||||
return reg;
|
||||
|
||||
value = tps65910_reg_read(pmic, reg);
|
||||
value = tps65910_reg_read_locked(pmic, reg);
|
||||
if (value < 0)
|
||||
return value;
|
||||
|
||||
@ -669,7 +664,7 @@ static int tps65911_get_voltage(struct regulator_dev *dev)
|
||||
|
||||
reg = pmic->get_ctrl_reg(id);
|
||||
|
||||
value = tps65910_reg_read(pmic, reg);
|
||||
value = tps65910_reg_read_locked(pmic, reg);
|
||||
|
||||
switch (id) {
|
||||
case TPS65911_REG_LDO1:
|
||||
@ -728,7 +723,7 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
|
||||
tps65910_modify_bits(pmic, TPS65910_VDD1,
|
||||
(dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
|
||||
VDD1_VGAIN_SEL_MASK);
|
||||
tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
|
||||
tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
|
||||
break;
|
||||
case TPS65910_REG_VDD2:
|
||||
dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
|
||||
@ -739,11 +734,11 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
|
||||
tps65910_modify_bits(pmic, TPS65910_VDD2,
|
||||
(dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
|
||||
VDD1_VGAIN_SEL_MASK);
|
||||
tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
|
||||
tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
|
||||
break;
|
||||
case TPS65911_REG_VDDCTRL:
|
||||
vsel = selector + 3;
|
||||
tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
|
||||
tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -994,10 +989,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
|
||||
|
||||
/* External EN1 control */
|
||||
if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
|
||||
ret = tps65910_set_bits(mfd,
|
||||
ret = tps65910_reg_set_bits(mfd,
|
||||
TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
|
||||
else
|
||||
ret = tps65910_clear_bits(mfd,
|
||||
ret = tps65910_reg_clear_bits(mfd,
|
||||
TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
|
||||
if (ret < 0) {
|
||||
dev_err(mfd->dev,
|
||||
@ -1007,10 +1002,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
|
||||
|
||||
/* External EN2 control */
|
||||
if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
|
||||
ret = tps65910_set_bits(mfd,
|
||||
ret = tps65910_reg_set_bits(mfd,
|
||||
TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
|
||||
else
|
||||
ret = tps65910_clear_bits(mfd,
|
||||
ret = tps65910_reg_clear_bits(mfd,
|
||||
TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
|
||||
if (ret < 0) {
|
||||
dev_err(mfd->dev,
|
||||
@ -1022,10 +1017,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
|
||||
if ((tps65910_chip_id(mfd) == TPS65910) &&
|
||||
(id >= TPS65910_REG_VDIG1)) {
|
||||
if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
|
||||
ret = tps65910_set_bits(mfd,
|
||||
ret = tps65910_reg_set_bits(mfd,
|
||||
TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
|
||||
else
|
||||
ret = tps65910_clear_bits(mfd,
|
||||
ret = tps65910_reg_clear_bits(mfd,
|
||||
TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
|
||||
if (ret < 0) {
|
||||
dev_err(mfd->dev,
|
||||
@ -1037,10 +1032,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
|
||||
/* Return if no external control is selected */
|
||||
if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
|
||||
/* Clear all sleep controls */
|
||||
ret = tps65910_clear_bits(mfd,
|
||||
ret = tps65910_reg_clear_bits(mfd,
|
||||
TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
|
||||
if (!ret)
|
||||
ret = tps65910_clear_bits(mfd,
|
||||
ret = tps65910_reg_clear_bits(mfd,
|
||||
TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
|
||||
if (ret < 0)
|
||||
dev_err(mfd->dev,
|
||||
@ -1059,32 +1054,33 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
|
||||
(tps65910_chip_id(mfd) == TPS65911))) {
|
||||
int op_reg_add = pmic->get_ctrl_reg(id) + 1;
|
||||
int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
|
||||
int opvsel = tps65910_reg_read(pmic, op_reg_add);
|
||||
int srvsel = tps65910_reg_read(pmic, sr_reg_add);
|
||||
int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
|
||||
int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
|
||||
if (opvsel & VDD1_OP_CMD_MASK) {
|
||||
u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
|
||||
ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
|
||||
ret = tps65910_reg_write_locked(pmic, op_reg_add,
|
||||
reg_val);
|
||||
if (ret < 0) {
|
||||
dev_err(mfd->dev,
|
||||
"Error in configuring op register\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
ret = tps65910_reg_write(pmic, sr_reg_add, 0);
|
||||
ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
|
||||
if (ret < 0) {
|
||||
dev_err(mfd->dev, "Error in settting sr register\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
ret = tps65910_clear_bits(mfd,
|
||||
ret = tps65910_reg_clear_bits(mfd,
|
||||
TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
|
||||
if (!ret) {
|
||||
if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
|
||||
ret = tps65910_set_bits(mfd,
|
||||
ret = tps65910_reg_set_bits(mfd,
|
||||
TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
|
||||
else
|
||||
ret = tps65910_clear_bits(mfd,
|
||||
ret = tps65910_reg_clear_bits(mfd,
|
||||
TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
|
||||
}
|
||||
if (ret < 0)
|
||||
@ -1117,7 +1113,7 @@ static __devinit int tps65910_probe(struct platform_device *pdev)
|
||||
platform_set_drvdata(pdev, pmic);
|
||||
|
||||
/* Give control of all register to control port */
|
||||
tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
|
||||
tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
|
||||
DEVCTRL_SR_CTL_I2C_SEL_MASK);
|
||||
|
||||
switch(tps65910_chip_id(tps65910)) {
|
||||
|
||||
@ -18,6 +18,7 @@
|
||||
#define __LINUX_MFD_TPS65910_H
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
/* TPS chip id list */
|
||||
#define TPS65910 0
|
||||
@ -823,8 +824,6 @@ struct tps65910 {
|
||||
struct regmap *regmap;
|
||||
struct mutex io_mutex;
|
||||
unsigned int id;
|
||||
int (*read)(struct tps65910 *tps65910, u8 reg, int size, void *dest);
|
||||
int (*write)(struct tps65910 *tps65910, u8 reg, int size, void *src);
|
||||
|
||||
/* Client devices */
|
||||
struct tps65910_pmic *pmic;
|
||||
@ -847,8 +846,6 @@ struct tps65910_platform_data {
|
||||
int irq_base;
|
||||
};
|
||||
|
||||
int tps65910_set_bits(struct tps65910 *tps65910, u8 reg, u8 mask);
|
||||
int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask);
|
||||
void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base);
|
||||
int tps65910_irq_init(struct tps65910 *tps65910, int irq,
|
||||
struct tps65910_platform_data *pdata);
|
||||
@ -859,4 +856,28 @@ static inline int tps65910_chip_id(struct tps65910 *tps65910)
|
||||
return tps65910->id;
|
||||
}
|
||||
|
||||
static inline int tps65910_reg_read(struct tps65910 *tps65910, u8 reg,
|
||||
unsigned int *val)
|
||||
{
|
||||
return regmap_read(tps65910->regmap, reg, val);
|
||||
}
|
||||
|
||||
static inline int tps65910_reg_write(struct tps65910 *tps65910, u8 reg,
|
||||
unsigned int val)
|
||||
{
|
||||
return regmap_write(tps65910->regmap, reg, val);
|
||||
}
|
||||
|
||||
static inline int tps65910_reg_set_bits(struct tps65910 *tps65910, u8 reg,
|
||||
u8 mask)
|
||||
{
|
||||
return regmap_update_bits(tps65910->regmap, reg, mask, mask);
|
||||
}
|
||||
|
||||
static inline int tps65910_reg_clear_bits(struct tps65910 *tps65910, u8 reg,
|
||||
u8 mask)
|
||||
{
|
||||
return regmap_update_bits(tps65910->regmap, reg, mask, 0);
|
||||
}
|
||||
|
||||
#endif /* __LINUX_MFD_TPS65910_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user