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clk: samsung: exynos5433: Move PLL rates data to init section

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The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Krzysztof Kozlowski 2016-05-11 14:02:11 +02:00 committed by Sylwester Nawrocki
parent a6cd1fbc4b
commit 402b7cebf2
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/samsung/clk-exynos5433.c
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@ -693,7 +693,7 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = {
* ATLAS_PLL & APOLLO_PLL & MEM0_PLL & MEM1_PLL & BUS_PLL & MFC_PLL
* & MPHY_PLL & G3D_PLL & DISP_PLL & ISP_PLL
*/
static const struct samsung_pll_rate_table exynos5443_pll_rates[] = {
static const struct samsung_pll_rate_table exynos5443_pll_rates[] __initconst = {
PLL_35XX_RATE(2500000000U, 625, 6, 0),
PLL_35XX_RATE(2400000000U, 500, 5, 0),
PLL_35XX_RATE(2300000000U, 575, 6, 0),
@ -744,7 +744,7 @@ static const struct samsung_pll_rate_table exynos5443_pll_rates[] = {
};
/* AUD_PLL */
static const struct samsung_pll_rate_table exynos5443_aud_pll_rates[] = {
static const struct samsung_pll_rate_table exynos5443_aud_pll_rates[] __initconst = {
PLL_36XX_RATE(400000000U, 200, 3, 2, 0),
PLL_36XX_RATE(393216000U, 197, 3, 2, -25690),
PLL_36XX_RATE(384000000U, 128, 2, 2, 0),