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ARM: nomadik: fix up SD/MMC DT settings
The DTSI file for the Nomadik does not properly specify how the PL180 levelshifter is connected: the Nomadik actually needs all the five st,sig-dir-* flags set to properly control all lines out. Further this board supports full power cycling of the card, and since this variant has no hardware clock gating, it needs a ridiculously low frequency setting to keep up with the ever overflowing FIFO. The pin configuration set-up is a bit of a mystery, because of course these pins are a mix of inputs and outputs. However the reference implementation sets all pins to "output" with unspecified initial value, so let's do that here as well. Cc: stable@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -127,22 +127,14 @@
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};
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};
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mmcsd_default_mode: mmcsd_default {
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mmcsd_default_mode: mmcsd_default {
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mmcsd_default_cfg1 {
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mmcsd_default_cfg1 {
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/* MCCLK */
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/*
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pins = "GPIO8_B10";
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* MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
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ste,output = <0>;
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* MCCMD, MCDAT3-0, MCMSFBCLK
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};
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*/
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mmcsd_default_cfg2 {
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pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
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/* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */
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"GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
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pins = "GPIO10_C11", "GPIO15_A12",
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"GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
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"GPIO16_C13", "GPIO23_D15";
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ste,output = <2>;
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ste,output = <1>;
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};
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mmcsd_default_cfg3 {
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/* MCCMD, MCDAT3-0, MCMSFBCLK */
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pins = "GPIO9_A10", "GPIO11_B11",
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"GPIO12_A11", "GPIO13_C12",
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"GPIO14_B12", "GPIO24_C15";
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ste,input = <1>;
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};
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};
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};
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};
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};
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};
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@ -802,10 +794,21 @@
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clock-names = "mclk", "apb_pclk";
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clock-names = "mclk", "apb_pclk";
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interrupt-parent = <&vica>;
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interrupt-parent = <&vica>;
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interrupts = <22>;
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interrupts = <22>;
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max-frequency = <48000000>;
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max-frequency = <400000>;
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bus-width = <4>;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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cap-sd-highspeed;
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full-pwr-cycle;
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/*
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* The STw4811 circuit used with the Nomadik strictly
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* requires that all of these signal direction pins be
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* routed and used for its 4-bit levelshifter.
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*/
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st,sig-dir-dat0;
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st,sig-dir-dat2;
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st,sig-dir-dat31;
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st,sig-dir-cmd;
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st,sig-pin-fbclk;
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
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pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
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vmmc-supply = <&vmmc_regulator>;
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vmmc-supply = <&vmmc_regulator>;
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