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OMAP: DSS2: Remove FB_OMAP_BOOTLOADER_INIT support
FB_OMAP_BOOTLOADER_INIT does not work, and it was only partially implemented for SDI. This patch removes support for FB_OMAP_BOOTLOADER_INIT to clean up the code and to remove any assumptions that FB_OMAP_BOOTLOADER_INIT would work. Proper implementation is much more complex, requiring early boot time register and clock handling to keep the DSS running. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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1bb4783506
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@ -166,7 +166,6 @@ static inline void dss_uninitialize_debugfs(void)
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static int omap_dss_probe(struct platform_device *pdev)
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{
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struct omap_dss_board_info *pdata = pdev->dev.platform_data;
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int skip_init = 0;
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int r;
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int i;
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@ -210,13 +209,8 @@ static int omap_dss_probe(struct platform_device *pdev)
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goto err_venc;
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}
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#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
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/* DISPC_CONTROL */
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if (omap_readl(0x48050440) & 1) /* LCD enabled? */
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skip_init = 1;
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#endif
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if (cpu_is_omap34xx()) {
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r = sdi_init(skip_init);
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r = sdi_init();
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if (r) {
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DSSERR("Failed to initialize SDI\n");
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goto err_sdi;
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@ -559,7 +559,7 @@ void dss_set_dac_pwrdn_bgz(bool enable)
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REG_FLD_MOD(DSS_CONTROL, enable, 5, 5); /* DAC Power-Down Control */
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}
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static int dss_init(bool skip_init)
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static int dss_init(void)
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{
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int r;
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u32 rev;
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@ -578,22 +578,20 @@ static int dss_init(bool skip_init)
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goto fail0;
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}
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if (!skip_init) {
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/* disable LCD and DIGIT output. This seems to fix the synclost
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* problem that we get, if the bootloader starts the DSS and
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* the kernel resets it */
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omap_writel(omap_readl(0x48050440) & ~0x3, 0x48050440);
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/* disable LCD and DIGIT output. This seems to fix the synclost
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* problem that we get, if the bootloader starts the DSS and
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* the kernel resets it */
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omap_writel(omap_readl(0x48050440) & ~0x3, 0x48050440);
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/* We need to wait here a bit, otherwise we sometimes start to
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* get synclost errors, and after that only power cycle will
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* restore DSS functionality. I have no idea why this happens.
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* And we have to wait _before_ resetting the DSS, but after
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* enabling clocks.
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*/
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msleep(50);
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/* We need to wait here a bit, otherwise we sometimes start to
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* get synclost errors, and after that only power cycle will
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* restore DSS functionality. I have no idea why this happens.
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* And we have to wait _before_ resetting the DSS, but after
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* enabling clocks.
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*/
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msleep(50);
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_omap_dss_reset();
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}
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_omap_dss_reset();
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/* autoidle */
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REG_FLD_MOD(DSS_SYSCONFIG, 1, 0, 0);
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@ -954,7 +952,6 @@ void dss_debug_dump_clocks(struct seq_file *s)
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static int omap_dsshw_probe(struct platform_device *pdev)
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{
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int r;
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int skip_init = 0;
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dss.pdev = pdev;
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@ -967,13 +964,7 @@ static int omap_dsshw_probe(struct platform_device *pdev)
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dss.ctx_id = dss_get_ctx_id();
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DSSDBG("initial ctx id %u\n", dss.ctx_id);
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#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
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/* DISPC_CONTROL */
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if (omap_readl(0x48050440) & 1) /* LCD enabled? */
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skip_init = 1;
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#endif
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r = dss_init(skip_init);
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r = dss_init();
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if (r) {
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DSSERR("Failed to initialize DSS\n");
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goto err_dss;
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@ -251,11 +251,11 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
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/* SDI */
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#ifdef CONFIG_OMAP2_DSS_SDI
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int sdi_init(bool skip_init);
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int sdi_init(void);
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void sdi_exit(void);
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int sdi_init_display(struct omap_dss_device *display);
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#else
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static inline int sdi_init(bool skip_init)
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static inline int sdi_init(void)
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{
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return 0;
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}
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@ -30,7 +30,6 @@
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#include "dss.h"
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static struct {
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bool skip_init;
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bool update_enabled;
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struct regulator *vdds_sdi_reg;
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} sdi;
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@ -68,9 +67,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
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if (r)
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goto err1;
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/* In case of skip_init sdi_init has already enabled the clocks */
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if (!sdi.skip_init)
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
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sdi_basic_init(dssdev);
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@ -80,14 +77,8 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
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dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
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dssdev->panel.acbi, dssdev->panel.acb);
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if (!sdi.skip_init) {
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r = dss_calc_clock_div(1, t->pixel_clock * 1000,
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&dss_cinfo, &dispc_cinfo);
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} else {
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r = dss_get_clock_div(&dss_cinfo);
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r = dispc_get_clock_div(dssdev->manager->id, &dispc_cinfo);
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}
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r = dss_calc_clock_div(1, t->pixel_clock * 1000,
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&dss_cinfo, &dispc_cinfo);
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if (r)
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goto err2;
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@ -116,18 +107,14 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
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if (r)
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goto err2;
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if (!sdi.skip_init) {
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dss_sdi_init(dssdev->phy.sdi.datapairs);
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r = dss_sdi_enable();
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if (r)
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goto err1;
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mdelay(2);
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}
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dss_sdi_init(dssdev->phy.sdi.datapairs);
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r = dss_sdi_enable();
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if (r)
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goto err1;
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mdelay(2);
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dssdev->manager->enable(dssdev->manager);
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sdi.skip_init = 0;
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return 0;
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err2:
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
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@ -173,17 +160,8 @@ int sdi_init_display(struct omap_dss_device *dssdev)
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return 0;
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}
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int sdi_init(bool skip_init)
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int sdi_init(void)
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{
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/* we store this for first display enable, then clear it */
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sdi.skip_init = skip_init;
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/*
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* Enable clocks already here, otherwise there would be a toggle
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* of them until sdi_display_enable is called.
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*/
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if (skip_init)
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
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return 0;
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}
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