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ARM: shmobile: apmu: Add more register documentation

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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2016-12-05 11:39:37 +01:00 committed by Simon Horman
parent 7ce7d89f48
commit 460d4117a4
1 changed files with 10 additions and 4 deletions
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14
arch/arm/mach-shmobile/platsmp-apmu.c
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@ -31,9 +31,15 @@ static struct {
int bit;
} apmu_cpus[NR_CPUS];
#define WUPCR_OFFS 0x10
#define PSTR_OFFS 0x40
#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
#define WUPCR_OFFS 0x10 /* Wake Up Control Register */
#define PSTR_OFFS 0x40 /* Power Status Register */
#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
/* CPUn Power Status Control Register */
/* Power Status Register */
#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */
#define CPUST_RUN 0 /* Run Mode */
#define CPUST_STANDBY 3 /* CoreStandby Mode */
static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
{
@ -59,7 +65,7 @@ static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
int k;
for (k = 0; k < 1000; k++) {
if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3)
if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
return 1;
mdelay(1);