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pata_via: store UDMA masks in via_isa_bridges table
* store UDMA masks in via_isa_bridges[] and while at it make "flags" field to be u8 instead of u16 * convert the driver to use UDMA masks from via_isa_bridges[] * remove no longer needed VIA_UDMA* defines Make some minor documentation and CodingStyle fixes while at it. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz
Jeff Garzik
parent
f777582f49
commit
460f531846
@ -22,6 +22,7 @@
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* VIA VT8233c - UDMA100
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* VIA VT8235 - UDMA133
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* VIA VT8237 - UDMA133
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* VIA VT8237A - UDMA133
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* VIA VT8237S - UDMA133
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* VIA VT8251 - UDMA133
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*
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@ -64,26 +65,15 @@
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#define DRV_NAME "pata_via"
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#define DRV_VERSION "0.3.4"
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/*
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* The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
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* driver.
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*/
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enum {
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VIA_UDMA = 0x007,
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VIA_UDMA_NONE = 0x000,
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VIA_UDMA_33 = 0x001,
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VIA_UDMA_66 = 0x002,
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VIA_UDMA_100 = 0x003,
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VIA_UDMA_133 = 0x004,
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VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
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VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
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VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
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VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
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VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
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VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
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VIA_NO_ENABLES = 0x400, /* Has no enablebits */
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VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
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VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
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VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
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VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
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VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
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VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
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VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
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VIA_NO_ENABLES = 0x40, /* Has no enablebits */
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VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
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};
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enum {
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@ -99,40 +89,37 @@ static const struct via_isa_bridge {
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u16 id;
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u8 rev_min;
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u8 rev_max;
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u16 flags;
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u8 udma_mask;
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u8 flags;
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} via_isa_bridges[] = {
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{ "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f,
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VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
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{ "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 |
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VIA_BAD_AST | VIA_SATA_PATA },
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{ "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f,
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VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
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{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
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{ "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
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{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
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{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
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{ "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
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{ "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
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{ "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
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{ "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
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{ "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
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{ "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
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{ "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
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{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
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{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
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{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
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{ "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f,
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VIA_UDMA_133 | VIA_BAD_AST },
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{ "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
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{ "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
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{ "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
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{ "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
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{ "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
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{ "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
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{ "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
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{ "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
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{ "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
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{ "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
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{ "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
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{ "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
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{ "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
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{ "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
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{ "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
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{ "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
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{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
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{ "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
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{ "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
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{ NULL }
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};
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@ -191,10 +178,10 @@ static int via_cable_detect(struct ata_port *ap) {
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return ATA_CBL_SATA;
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/* Early chips are 40 wire */
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if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
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if (config->udma_mask < ATA_UDMA4)
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return ATA_CBL_PATA40;
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/* UDMA 66 chips have only drive side logic */
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else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
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else if (config->udma_mask < ATA_UDMA5)
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return ATA_CBL_PATA_UNK;
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/* UDMA 100 or later */
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pci_read_config_dword(pdev, 0x50, &ata66);
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@ -233,7 +220,6 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
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* @ap: ATA interface
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* @adev: ATA device
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* @mode: ATA mode being programmed
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* @tdiv: Clocks per PCI clock
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* @set_ast: Set to program address setup
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* @udma_type: UDMA mode/format of registers
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*
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@ -244,17 +230,27 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline)
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* on the two channels.
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*/
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static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
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static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
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int mode, int set_ast, int udma_type)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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struct ata_device *peer = ata_dev_pair(adev);
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struct ata_timing t, p;
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static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
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static int via_clock = 33333; /* Bus clock in kHZ */
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unsigned long T = 1000000000 / via_clock;
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unsigned long UT = T/tdiv;
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unsigned long UT = T;
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int ut;
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int offset = 3 - (2*ap->port_no) - adev->devno;
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switch (udma_type) {
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case ATA_UDMA4:
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UT = T / 2; break;
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case ATA_UDMA5:
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UT = T / 3; break;
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case ATA_UDMA6:
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UT = T / 4; break;
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}
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/* Calculate the timing values we require */
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ata_timing_compute(adev, mode, &t, T, UT);
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@ -284,22 +280,20 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo
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((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
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/* Load the UDMA bits according to type */
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switch(udma_type) {
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default:
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/* BUG() ? */
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/* fall through */
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case 33:
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ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
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break;
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case 66:
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ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
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break;
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case 100:
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ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
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break;
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case 133:
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ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
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break;
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switch (udma_type) {
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case ATA_UDMA2:
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default:
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ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
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break;
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case ATA_UDMA4:
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ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
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break;
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case ATA_UDMA5:
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ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
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break;
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case ATA_UDMA6:
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ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
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break;
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}
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/* Set UDMA unless device is not UDMA capable */
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@ -325,22 +319,16 @@ static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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const struct via_isa_bridge *config = ap->host->private_data;
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int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
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int mode = config->flags & VIA_UDMA;
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static u8 tclock[5] = { 1, 1, 2, 3, 4 };
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static u8 udma[5] = { 0, 33, 66, 100, 133 };
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via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
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via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
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}
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static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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const struct via_isa_bridge *config = ap->host->private_data;
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int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
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int mode = config->flags & VIA_UDMA;
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static u8 tclock[5] = { 1, 1, 2, 3, 4 };
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static u8 udma[5] = { 0, 33, 66, 100, 133 };
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via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
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via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
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}
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/**
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@ -604,33 +592,29 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
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via_config_fifo(pdev, config->flags);
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/* Clock set up */
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switch(config->flags & VIA_UDMA) {
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case VIA_UDMA_NONE:
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if (config->flags & VIA_NO_UNMASK)
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ppi[0] = &via_mwdma_info_borked;
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else
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ppi[0] = &via_mwdma_info;
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break;
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case VIA_UDMA_33:
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ppi[0] = &via_udma33_info;
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break;
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case VIA_UDMA_66:
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ppi[0] = &via_udma66_info;
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/* The 66 MHz devices require we enable the clock */
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pci_read_config_dword(pdev, 0x50, &timing);
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timing |= 0x80008;
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pci_write_config_dword(pdev, 0x50, timing);
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break;
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case VIA_UDMA_100:
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ppi[0] = &via_udma100_info;
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break;
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case VIA_UDMA_133:
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ppi[0] = &via_udma133_info;
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break;
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default:
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WARN_ON(1);
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return -ENODEV;
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}
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switch (config->udma_mask) {
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case 0x00:
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if (config->flags & VIA_NO_UNMASK)
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ppi[0] = &via_mwdma_info_borked;
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else
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ppi[0] = &via_mwdma_info;
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break;
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case ATA_UDMA2:
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ppi[0] = &via_udma33_info;
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break;
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case ATA_UDMA4:
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ppi[0] = &via_udma66_info;
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break;
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case ATA_UDMA5:
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ppi[0] = &via_udma100_info;
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break;
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case ATA_UDMA6:
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ppi[0] = &via_udma133_info;
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break;
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default:
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WARN_ON(1);
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return -ENODEV;
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}
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if (config->flags & VIA_BAD_CLK66) {
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/* Disable the 66MHz clock on problem devices */
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@ -667,7 +651,7 @@ static int via_reinit_one(struct pci_dev *pdev)
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via_config_fifo(pdev, config->flags);
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if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
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if (config->udma_mask == ATA_UDMA4) {
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/* The 66 MHz devices require we enable the clock */
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pci_read_config_dword(pdev, 0x50, &timing);
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timing |= 0x80008;
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