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MSI: Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT
0x08 is the HT capability, while PCI_CAP_ID_HT_IRQCONF would be the subtype 0x80 that mpic_scan_ht_pic() uses. Rename PCI_CAP_ID_HT_IRQCONF into PCI_CAP_ID_HT. And by the way, use it in the ipath driver instead of defining its own HT_CAPABILITY_ID. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -339,7 +339,7 @@ static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
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for (pos = readb(devbase + PCI_CAPABILITY_LIST); pos != 0;
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pos = readb(devbase + pos + PCI_CAP_LIST_NEXT)) {
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u8 id = readb(devbase + pos + PCI_CAP_LIST_ID);
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if (id == PCI_CAP_ID_HT_IRQCONF) {
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if (id == PCI_CAP_ID_HT) {
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id = readb(devbase + pos + 3);
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if (id == 0x80)
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break;
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@ -742,7 +742,6 @@ static int ipath_setup_ht_reset(struct ipath_devdata *dd)
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return 0;
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}
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#define HT_CAPABILITY_ID 0x08 /* HT capabilities not defined in kernel */
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#define HT_INTR_DISC_CONFIG 0x80 /* HT interrupt and discovery cap */
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#define HT_INTR_REG_INDEX 2 /* intconfig requires indirect accesses */
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@ -973,7 +972,7 @@ static int ipath_setup_ht_config(struct ipath_devdata *dd,
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* do this early, before we ever enable errors or hardware errors,
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* mostly to avoid causing the chip to enter freeze mode.
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*/
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pos = pci_find_capability(pdev, HT_CAPABILITY_ID);
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pos = pci_find_capability(pdev, PCI_CAP_ID_HT);
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if (!pos) {
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ipath_dev_err(dd, "Couldn't find HyperTransport "
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"capability; no interrupts\n");
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@ -996,7 +995,7 @@ static int ipath_setup_ht_config(struct ipath_devdata *dd,
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else if (cap_type == HT_INTR_DISC_CONFIG)
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ihandler = set_int_handler(dd, pdev, pos);
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} while ((pos = pci_find_next_capability(pdev, pos,
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HT_CAPABILITY_ID)));
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PCI_CAP_ID_HT)));
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if (!ihandler) {
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ipath_dev_err(dd, "Couldn't find interrupt handler in "
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@ -196,7 +196,7 @@
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#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */
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#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */
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#define PCI_CAP_ID_PCIX 0x07 /* PCI-X */
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#define PCI_CAP_ID_HT_IRQCONF 0x08 /* HyperTransport IRQ Configuration */
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#define PCI_CAP_ID_HT 0x08 /* HyperTransport */
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#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific capability */
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#define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */
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#define PCI_CAP_ID_EXP 0x10 /* PCI Express */
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