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staging: fbtft: Use standard MIPI DCS command defines for ili9486

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This patch makes use of the standard MIPI Display Command Set to remove
some of the magic constants found in source code.

Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Priit Laes 2015-12-20 20:36:02 +02:00 committed by Greg Kroah-Hartman
parent 89823edc63
commit 49475ed0cb
1 changed files with 18 additions and 17 deletions
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35
drivers/staging/fbtft/fb_ili9486.c
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@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <video/mipi_display.h>
#include "fbtft.h"
@ -28,11 +29,10 @@
static int default_init_sequence[] = {
/* Interface Mode Control */
-1, 0xb0, 0x0,
/* Sleep OUT */
-1, 0x11,
-1, MIPI_DCS_EXIT_SLEEP_MODE,
-2, 250,
/* Interface Pixel Format */
-1, 0x3A, 0x55,
-1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55,
/* Power Control 3 */
-1, 0xC2, 0x44,
/* VCOM Control 1 */
@ -46,40 +46,41 @@ static int default_init_sequence[] = {
/* Digital Gamma Control 1 */
-1, 0xE2, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
/* Sleep OUT */
-1, 0x11,
/* Display ON */
-1, 0x29,
-1, MIPI_DCS_EXIT_SLEEP_MODE,
-1, MIPI_DCS_SET_DISPLAY_ON,
/* end marker */
-3
};
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
/* Column address */
write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
/* Row address */
write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
/* Memory write */
write_reg(par, 0x2C);
write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
}
static int set_var(struct fbtft_par *par)
{
switch (par->info->var.rotate) {
case 0:
write_reg(par, 0x36, 0x80 | (par->bgr << 3));
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
0x80 | (par->bgr << 3));
break;
case 90:
write_reg(par, 0x36, 0x20 | (par->bgr << 3));
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
0x20 | (par->bgr << 3));
break;
case 180:
write_reg(par, 0x36, 0x40 | (par->bgr << 3));
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
0x40 | (par->bgr << 3));
break;
case 270:
write_reg(par, 0x36, 0xE0 | (par->bgr << 3));
write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
0xE0 | (par->bgr << 3));
break;
default:
break;