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https://github.com/FEX-Emu/linux.git
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Merge branch 'samsung/fixes' of git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into fixes
This commit is contained in:
commit
4a3f4233c5
@ -520,7 +520,7 @@ static struct clk init_clocks_off[] = {
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.ctrlbit = (1 << 21),
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}, {
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.name = "ac97",
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.id = -1,
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.devname = "samsung-ac97",
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.enable = exynos4_clk_ip_peril_ctrl,
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.ctrlbit = (1 << 27),
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}, {
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@ -24,12 +24,13 @@
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#include <plat/exynos4.h>
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#include <plat/adc-core.h>
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#include <plat/sdhci.h>
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#include <plat/devs.h>
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#include <plat/fb-core.h>
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#include <plat/fimc-core.h>
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#include <plat/iic-core.h>
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#include <plat/reset.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-pmu.h>
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extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
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unsigned int irq_start);
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@ -128,6 +129,11 @@ static void exynos4_idle(void)
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local_irq_enable();
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}
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static void exynos4_sw_reset(void)
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{
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__raw_writel(0x1, S5P_SWRESET);
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}
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/*
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* exynos4_map_io
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*
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@ -241,5 +247,8 @@ int __init exynos4_init(void)
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/* set idle function */
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pm_idle = exynos4_idle;
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/* set sw_reset function */
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s5p_reset_hook = exynos4_sw_reset;
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return sysdev_register(&exynos4_sysdev);
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}
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@ -80,9 +80,8 @@
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#define IRQ_HSMMC3 IRQ_SPI(76)
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#define IRQ_DWMCI IRQ_SPI(77)
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#define IRQ_MIPICSI0 IRQ_SPI(78)
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#define IRQ_MIPICSI1 IRQ_SPI(80)
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#define IRQ_MIPI_CSIS0 IRQ_SPI(78)
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#define IRQ_MIPI_CSIS1 IRQ_SPI(80)
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#define IRQ_ONENAND_AUDI IRQ_SPI(82)
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#define IRQ_ROTATOR IRQ_SPI(83)
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@ -29,6 +29,8 @@
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#define S5P_USE_STANDBY_WFE1 (1 << 25)
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#define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24))
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#define S5P_SWRESET S5P_PMUREG(0x0400)
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#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
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#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
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#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
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@ -23,6 +23,8 @@
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#include <mach/regs-gpio.h>
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#include <asm/mach/irq.h>
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static DEFINE_SPINLOCK(eint_lock);
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static unsigned int eint0_15_data[16];
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@ -184,8 +186,11 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
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static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_get_chip(irq);
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chained_irq_enter(chip, desc);
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exynos4_irq_demux_eint(IRQ_EINT(16));
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exynos4_irq_demux_eint(IRQ_EINT(24));
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chained_irq_exit(chip, desc);
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}
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static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
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@ -193,6 +198,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
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u32 *irq_data = irq_get_handler_data(irq);
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struct irq_chip *chip = irq_get_chip(irq);
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chained_irq_enter(chip, desc);
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chip->irq_mask(&desc->irq_data);
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if (chip->irq_ack)
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@ -201,6 +207,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
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generic_handle_irq(*irq_data);
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chip->irq_unmask(&desc->irq_data);
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chained_irq_exit(chip, desc);
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}
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int __init exynos4_init_irq_eint(void)
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@ -79,7 +79,7 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
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};
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static struct regulator_consumer_supply max8952_consumer =
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REGULATOR_SUPPLY("vddarm", NULL);
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REGULATOR_SUPPLY("vdd_arm", NULL);
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static struct max8952_platform_data universal_max8952_pdata __initdata = {
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.gpio_vid0 = EXYNOS4_GPX0(3),
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@ -105,7 +105,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
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};
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static struct regulator_consumer_supply lp3974_buck1_consumer =
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REGULATOR_SUPPLY("vddint", NULL);
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REGULATOR_SUPPLY("vdd_int", NULL);
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static struct regulator_consumer_supply lp3974_buck2_consumer =
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REGULATOR_SUPPLY("vddg3d", NULL);
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@ -82,7 +82,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
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rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK);
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writel(rstcon, EXYNOS4_RSTCON);
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udelay(50);
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udelay(80);
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clk_disable(otg_clk);
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clk_put(otg_clk);
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@ -16,6 +16,7 @@
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#include <linux/suspend.h>
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#include <linux/serial_core.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <mach/map.h>
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#include <mach/irqs.h>
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@ -129,7 +129,7 @@ static int s5p64x0_alloc_gc(void)
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}
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ct = gc->chip_types;
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ct->chip.irq_ack = irq_gc_ack;
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ct->chip.irq_ack = irq_gc_ack_set_bit;
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ct->chip.irq_mask = irq_gc_mask_set_bit;
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ct->chip.irq_unmask = irq_gc_mask_clr_bit;
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ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
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@ -88,7 +88,7 @@ static struct sleep_save s5pv210_core_save[] = {
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SAVE_ITEM(S3C2410_TCNTO(0)),
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};
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void s5pv210_cpu_suspend(unsigned long arg)
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static int s5pv210_cpu_suspend(unsigned long arg)
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{
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unsigned long tmp;
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@ -192,7 +192,7 @@ unsigned long s5p_spdif_get_rate(struct clk *clk)
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if (IS_ERR(pclk))
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return -EINVAL;
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rate = pclk->ops->get_rate(clk);
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rate = pclk->ops->get_rate(pclk);
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clk_put(pclk);
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return rate;
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@ -23,6 +23,8 @@
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#include <plat/gpio-core.h>
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#include <plat/gpio-cfg.h>
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#include <asm/mach/irq.h>
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#define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u)
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#define CON_OFFSET 0x700
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@ -81,6 +83,9 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
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int group, pend_offset, mask_offset;
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unsigned int pend, mask;
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struct irq_chip *chip = irq_get_chip(irq);
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chained_irq_enter(chip, desc);
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for (group = 0; group < bank->nr_groups; group++) {
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struct s3c_gpio_chip *chip = bank->chips[group];
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if (!chip)
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@ -102,6 +107,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
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pend &= ~BIT(offset);
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}
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}
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chained_irq_exit(chip, desc);
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}
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static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
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@ -20,7 +20,7 @@ struct samsung_bl_gpio_info {
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int func;
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};
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extern void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
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extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
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struct platform_pwm_backlight_data *bl_data);
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#endif /* __ASM_PLAT_BACKLIGHT_H */
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@ -22,9 +22,14 @@
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#include <plat/irq-vic-timer.h>
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#include <plat/regs-timer.h>
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#include <asm/mach/irq.h>
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static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_get_chip(irq);
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chained_irq_enter(chip, desc);
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generic_handle_irq((int)desc->irq_data.handler_data);
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chained_irq_exit(chip, desc);
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}
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/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
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