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synced 2025-01-14 05:12:17 +00:00
mei: push pci cfg structure me hw
Device specific configurations are currently only needed by me hw so we can remove it from txe Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -110,8 +110,9 @@ static inline void mei_hcsr_set(struct mei_me_hw *hw, u32 hcsr)
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static int mei_me_fw_status(struct mei_device *dev,
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struct mei_fw_status *fw_status)
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{
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const struct mei_fw_status *fw_src = &dev->cfg->fw_status;
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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struct mei_me_hw *hw = to_me_hw(dev);
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const struct mei_fw_status *fw_src = &hw->cfg->fw_status;
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int ret;
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int i;
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@ -846,14 +847,16 @@ struct mei_device *mei_me_dev_init(struct pci_dev *pdev,
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const struct mei_cfg *cfg)
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{
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struct mei_device *dev;
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struct mei_me_hw *hw;
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dev = kzalloc(sizeof(struct mei_device) +
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sizeof(struct mei_me_hw), GFP_KERNEL);
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if (!dev)
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return NULL;
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hw = to_me_hw(dev);
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mei_device_init(dev, &pdev->dev, &mei_me_hw_ops);
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dev->cfg = cfg;
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hw->cfg = cfg;
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return dev;
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}
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@ -19,14 +19,38 @@
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#ifndef _MEI_INTERFACE_H_
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#define _MEI_INTERFACE_H_
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#include <linux/mei.h>
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#include <linux/irqreturn.h>
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#include <linux/pci.h>
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#include <linux/mei.h>
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#include "mei_dev.h"
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#include "client.h"
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/*
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* mei_cfg - mei device configuration
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*
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* @fw_status: FW status
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* @quirk_probe: device exclusion quirk
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*/
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struct mei_cfg {
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const struct mei_fw_status fw_status;
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bool (*quirk_probe)(struct pci_dev *pdev);
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};
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#define MEI_PCI_DEVICE(dev, cfg) \
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.vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
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.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
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.driver_data = (kernel_ulong_t)&(cfg)
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#define MEI_ME_RPM_TIMEOUT 500 /* ms */
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/**
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* @cfg: per device generation config and ops
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*/
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struct mei_me_hw {
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const struct mei_cfg *cfg;
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void __iomem *mem_addr;
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/*
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* hw states of host and fw(ME)
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@ -573,6 +573,11 @@ static int mei_txe_readiness_wait(struct mei_device *dev)
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return 0;
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}
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const struct mei_fw_status mei_txe_fw_sts = {
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.count = 2,
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.status[0] = PCI_CFG_TXE_FW_STS0,
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.status[1] = PCI_CFG_TXE_FW_STS1
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};
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/**
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* mei_txe_fw_status - read fw status register from pci config space
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@ -583,7 +588,7 @@ static int mei_txe_readiness_wait(struct mei_device *dev)
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static int mei_txe_fw_status(struct mei_device *dev,
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struct mei_fw_status *fw_status)
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{
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const struct mei_fw_status *fw_src = &dev->cfg->fw_status;
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const struct mei_fw_status *fw_src = &mei_txe_fw_sts;
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struct pci_dev *pdev = to_pci_dev(dev->dev);
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int ret;
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int i;
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@ -1120,27 +1125,15 @@ static const struct mei_hw_ops mei_txe_hw_ops = {
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};
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#define MEI_CFG_TXE_FW_STS \
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.fw_status.count = 2, \
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.fw_status.status[0] = PCI_CFG_TXE_FW_STS0, \
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.fw_status.status[1] = PCI_CFG_TXE_FW_STS1
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const struct mei_cfg mei_txe_cfg = {
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MEI_CFG_TXE_FW_STS,
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};
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/**
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* mei_txe_dev_init - allocates and initializes txe hardware specific structure
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*
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* @pdev - pci device
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* @cfg - per device generation config
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*
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* returns struct mei_device * on success or NULL;
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*
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*/
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struct mei_device *mei_txe_dev_init(struct pci_dev *pdev,
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const struct mei_cfg *cfg)
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struct mei_device *mei_txe_dev_init(struct pci_dev *pdev)
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{
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struct mei_device *dev;
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struct mei_txe_hw *hw;
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@ -1156,7 +1149,6 @@ struct mei_device *mei_txe_dev_init(struct pci_dev *pdev,
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init_waitqueue_head(&hw->wait_aliveness_resp);
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dev->cfg = cfg;
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return dev;
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}
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@ -61,10 +61,7 @@ static inline struct mei_device *hw_txe_to_mei(struct mei_txe_hw *hw)
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return container_of((void *)hw, struct mei_device, hw);
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}
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extern const struct mei_cfg mei_txe_cfg;
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struct mei_device *mei_txe_dev_init(struct pci_dev *pdev,
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const struct mei_cfg *cfg);
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struct mei_device *mei_txe_dev_init(struct pci_dev *pdev);
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irqreturn_t mei_txe_irq_quick_handler(int irq, void *dev_id);
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irqreturn_t mei_txe_irq_thread_handler(int irq, void *dev_id);
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@ -380,24 +380,6 @@ enum mei_pg_state {
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const char *mei_pg_state_str(enum mei_pg_state state);
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/*
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* mei_cfg
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*
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* @fw_status - FW status
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* @quirk_probe - device exclusion quirk
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*/
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struct mei_cfg {
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const struct mei_fw_status fw_status;
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bool (*quirk_probe)(struct pci_dev *pdev);
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};
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#define MEI_PCI_DEVICE(dev, cfg) \
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.vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
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.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
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.driver_data = (kernel_ulong_t)&(cfg)
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/**
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* struct mei_device - MEI private device struct
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@ -416,7 +398,6 @@ struct mei_cfg {
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* @hbuf_depth - depth of hardware host/write buffer is slots
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* @hbuf_is_ready - query if the host host/write buffer is ready
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* @wr_msg - the buffer for hbm control messages
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* @cfg - per device generation config and ops
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*/
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struct mei_device {
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struct device *dev;
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@ -530,7 +511,6 @@ struct mei_device {
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const struct mei_hw_ops *ops;
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const struct mei_cfg *cfg;
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char hw[0] __aligned(sizeof(void *));
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};
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@ -36,7 +36,8 @@
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#include "hw-txe.h"
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static const struct pci_device_id mei_txe_pci_tbl[] = {
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{MEI_PCI_DEVICE(0x0F18, mei_txe_cfg)}, /* Baytrail */
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{PCI_VDEVICE(INTEL, 0x0F18)}, /* Baytrail */
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{0, }
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};
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MODULE_DEVICE_TABLE(pci, mei_txe_pci_tbl);
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@ -70,7 +71,6 @@ static void mei_txe_pci_iounmap(struct pci_dev *pdev, struct mei_txe_hw *hw)
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*/
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static int mei_txe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
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struct mei_device *dev;
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struct mei_txe_hw *hw;
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int err;
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@ -101,7 +101,7 @@ static int mei_txe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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/* allocates and initializes the mei dev structure */
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dev = mei_txe_dev_init(pdev, cfg);
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dev = mei_txe_dev_init(pdev);
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if (!dev) {
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err = -ENOMEM;
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goto release_regions;
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