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ARM OMAP2+ GPMC: fix programming/showing reserved timing parameters
GPMC_CONFIG1_i parameters CLKACTIVATIONTIME and WAITMONITORINGTIME have reserved values. Raise an error if calculated timings try to program reserved values. GPMC_CONFIG1_i ATTACHEDDEVICEPAGELENGTH and DEVICESIZE were already checked when parsing the DT. Explicitly comment invalid values on gpmc_cs_show_timings for -CLKACTIVATIONTIME -WAITMONITORINGTIME -DEVICESIZE -ATTACHEDDEVICEPAGELENGTH Signed-off-by: Robert ABEL <rabel@cit-ec.uni-bielefeld.de> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
This commit is contained in:
Robert ABEL
Roger Quadros
parent
7f2e8c58ae
commit
4b613e9b4b
@ -135,7 +135,11 @@
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#define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27)
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#define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27)
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#define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25)
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/** CLKACTIVATIONTIME Max Ticks */
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#define GPMC_CONFIG1_CLKACTIVATIONTIME_MAX 2
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#define GPMC_CONFIG1_PAGE_LEN(val) ((val & 3) << 23)
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/** ATTACHEDDEVICEPAGELENGTH Max Value */
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#define GPMC_CONFIG1_ATTACHEDDEVICEPAGELENGTH_MAX 2
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#define GPMC_CONFIG1_WAIT_READ_MON (1 << 22)
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#define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21)
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#define GPMC_CONFIG1_WAIT_MON_TIME(val) ((val & 3) << 18)
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@ -144,6 +148,8 @@
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#define GPMC_CONFIG1_WAIT_PIN_SEL(val) ((val & 3) << 16)
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#define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12)
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#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1)
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/** DEVICESIZE Max Value */
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#define GPMC_CONFIG1_DEVICESIZE_MAX 1
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#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10)
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#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0)
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#define GPMC_CONFIG1_MUXTYPE(val) ((val & 3) << 8)
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@ -404,6 +410,8 @@ static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p)
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* @reg: GPMC_CS_CONFIGn register offset.
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* @st_bit: Start Bit
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* @end_bit: End Bit. Must be >= @st_bit.
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* @ma:x Maximum parameter value (before optional @shift).
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* If 0, maximum is as high as @st_bit and @end_bit allow.
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* @name: DTS node name, w/o "gpmc,"
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* @cd: Clock Domain of timing parameter.
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* @shift: Parameter value left shifts @shift, which is then printed instead of value.
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@ -411,13 +419,14 @@ static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p)
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* raw format: gpmc,name = <value>
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* tick format: gpmc,name = <value> /‍* x ns -- y ns; x ticks *‍/
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* Where x ns -- y ns result in the same tick value.
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* When @max is exceeded, "invalid" is printed inside comment.
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* @noval: Parameter values equal to 0 are not printed.
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* @return: Specified timing parameter (after optional @shift).
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*
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*/
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static int get_gpmc_timing_reg(
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/* timing specifiers */
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int cs, int reg, int st_bit, int end_bit,
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int cs, int reg, int st_bit, int end_bit, int max,
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const char *name, const enum gpmc_clk_domain cd,
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/* value transform */
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int shift,
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@ -427,11 +436,15 @@ static int get_gpmc_timing_reg(
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u32 l;
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int nr_bits;
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int mask;
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bool invalid;
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l = gpmc_cs_read_reg(cs, reg);
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nr_bits = end_bit - st_bit + 1;
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mask = (1 << nr_bits) - 1;
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l = (l >> st_bit) & mask;
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if (!max)
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max = mask;
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invalid = l > max;
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if (shift)
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l = (shift << l);
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if (noval && (l == 0))
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@ -444,11 +457,13 @@ static int get_gpmc_timing_reg(
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if (l)
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time_ns_min = gpmc_clk_ticks_to_ns(l - 1, cs, cd) + 1;
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time_ns = gpmc_clk_ticks_to_ns(l, cs, cd);
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pr_info("gpmc,%s = <%u> /* %u ns - %u ns; %i ticks */\n",
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name, time_ns, time_ns_min, time_ns, l);
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pr_info("gpmc,%s = <%u> /* %u ns - %u ns; %i ticks%s*/\n",
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name, time_ns, time_ns_min, time_ns, l,
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invalid ? "; invalid " : " ");
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} else {
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/* raw format */
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pr_info("gpmc,%s = <%u>\n", name, l);
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pr_info("gpmc,%s = <%u>%s\n", name, l,
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invalid ? " /* invalid */" : "");
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}
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return l;
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@ -458,15 +473,19 @@ static int get_gpmc_timing_reg(
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pr_info("cs%i %s: 0x%08x\n", cs, #config, \
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gpmc_cs_read_reg(cs, config))
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#define GPMC_GET_RAW(reg, st, end, field) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), field, GPMC_CD_FCLK, 0, 1, 0)
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get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 0)
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#define GPMC_GET_RAW_MAX(reg, st, end, max, field) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, 0, 1, 0)
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#define GPMC_GET_RAW_BOOL(reg, st, end, field) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), field, GPMC_CD_FCLK, 0, 1, 1)
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#define GPMC_GET_RAW_SHIFT(reg, st, end, shift, field) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), field, GPMC_CD_FCLK, (shift), 1, 1)
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get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 1, 1)
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#define GPMC_GET_RAW_SHIFT_MAX(reg, st, end, shift, max, field) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, GPMC_CD_FCLK, (shift), 1, 1)
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#define GPMC_GET_TICKS(reg, st, end, field) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), field, GPMC_CD_FCLK, 0, 0, 0)
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get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, GPMC_CD_FCLK, 0, 0, 0)
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#define GPMC_GET_TICKS_CD(reg, st, end, field, cd) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), field, (cd), 0, 0, 0)
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get_gpmc_timing_reg(cs, (reg), (st), (end), 0, field, (cd), 0, 0, 0)
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#define GPMC_GET_TICKS_CD_MAX(reg, st, end, max, field, cd) \
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get_gpmc_timing_reg(cs, (reg), (st), (end), (max), field, (cd), 0, 0, 0)
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static void gpmc_show_regs(int cs, const char *desc)
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{
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@ -490,11 +509,14 @@ static void gpmc_cs_show_timings(int cs, const char *desc)
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pr_info("gpmc cs%i access configuration:\n", cs);
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GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 4, 4, "time-para-granularity");
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GPMC_GET_RAW(GPMC_CS_CONFIG1, 8, 9, "mux-add-data");
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GPMC_GET_RAW(GPMC_CS_CONFIG1, 12, 13, "device-width");
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GPMC_GET_RAW_MAX(GPMC_CS_CONFIG1, 12, 13,
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GPMC_CONFIG1_DEVICESIZE_MAX, "device-width");
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GPMC_GET_RAW(GPMC_CS_CONFIG1, 16, 17, "wait-pin");
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GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 21, 21, "wait-on-write");
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GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 22, 22, "wait-on-read");
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GPMC_GET_RAW_SHIFT(GPMC_CS_CONFIG1, 23, 24, 4, "burst-length");
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GPMC_GET_RAW_SHIFT_MAX(GPMC_CS_CONFIG1, 23, 24, 4,
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GPMC_CONFIG1_ATTACHEDDEVICEPAGELENGTH_MAX,
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"burst-length");
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GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 27, 27, "sync-write");
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GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 28, 28, "burst-write");
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GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 29, 29, "gpmc,sync-read");
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@ -534,8 +556,12 @@ static void gpmc_cs_show_timings(int cs, const char *desc)
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GPMC_GET_TICKS(GPMC_CS_CONFIG6, 0, 3, "bus-turnaround-ns");
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GPMC_GET_TICKS(GPMC_CS_CONFIG6, 8, 11, "cycle2cycle-delay-ns");
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GPMC_GET_TICKS_CD(GPMC_CS_CONFIG1, 18, 19, "wait-monitoring-ns", GPMC_CD_CLK);
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GPMC_GET_TICKS(GPMC_CS_CONFIG1, 25, 26, "clk-activation-ns");
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GPMC_GET_TICKS_CD_MAX(GPMC_CS_CONFIG1, 18, 19,
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GPMC_CONFIG1_WAITMONITORINGTIME_MAX,
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"wait-monitoring-ns", GPMC_CD_CLK);
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GPMC_GET_TICKS_CD_MAX(GPMC_CS_CONFIG1, 25, 26,
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GPMC_CONFIG1_CLKACTIVATIONTIME_MAX,
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"clk-activation-ns", GPMC_CD_FCLK);
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GPMC_GET_TICKS(GPMC_CS_CONFIG6, 16, 19, "wr-data-mux-bus-ns");
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GPMC_GET_TICKS(GPMC_CS_CONFIG6, 24, 28, "wr-access-ns");
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@ -555,12 +581,14 @@ static inline void gpmc_cs_show_timings(int cs, const char *desc)
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* @reg: GPMC_CS_CONFIGn register offset.
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* @st_bit: Start Bit
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* @end_bit: End Bit. Must be >= @st_bit.
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* @max: Maximum parameter value.
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* If 0, maximum is as high as @st_bit and @end_bit allow.
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* @time: Timing parameter in ns.
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* @cd: Timing parameter clock domain.
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* @name: Timing parameter name.
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* @return: 0 on success, -1 on error.
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*/
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static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
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static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, int max,
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int time, enum gpmc_clk_domain cd, const char *name)
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{
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u32 l;
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@ -573,9 +601,12 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
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nr_bits = end_bit - st_bit + 1;
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mask = (1 << nr_bits) - 1;
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if (ticks > mask) {
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if (!max)
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max = mask;
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if (ticks > max) {
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pr_err("%s: GPMC CS%d: %s %d ns, %d ticks > %d ticks\n",
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__func__, cs, name, time, ticks, mask);
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__func__, cs, name, time, ticks, max);
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return -1;
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}
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@ -594,13 +625,13 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
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return 0;
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}
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#define GPMC_SET_ONE_CD(reg, st, end, field, cd) \
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if (set_gpmc_timing_reg(cs, (reg), (st), (end), \
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t->field, (cd), #field) < 0) \
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#define GPMC_SET_ONE_CD_MAX(reg, st, end, max, field, cd) \
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if (set_gpmc_timing_reg(cs, (reg), (st), (end), (max), \
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t->field, (cd), #field) < 0) \
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return -1
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#define GPMC_SET_ONE(reg, st, end, field) \
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GPMC_SET_ONE_CD(reg, st, end, field, GPMC_CD_FCLK)
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GPMC_SET_ONE_CD_MAX(reg, st, end, 0, field, GPMC_CD_FCLK)
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/**
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* gpmc_calc_waitmonitoring_divider - calculate proper GPMCFCLKDIVIDER based on WAITMONITORINGTIME
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@ -729,8 +760,12 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t,
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l |= (div - 1);
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gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l);
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GPMC_SET_ONE_CD(GPMC_CS_CONFIG1, 18, 19, wait_monitoring, GPMC_CD_CLK);
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GPMC_SET_ONE(GPMC_CS_CONFIG1, 25, 26, clk_activation);
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GPMC_SET_ONE_CD_MAX(GPMC_CS_CONFIG1, 18, 19,
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GPMC_CONFIG1_WAITMONITORINGTIME_MAX,
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wait_monitoring, GPMC_CD_CLK);
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GPMC_SET_ONE_CD_MAX(GPMC_CS_CONFIG1, 25, 26,
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GPMC_CONFIG1_CLKACTIVATIONTIME_MAX,
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clk_activation, GPMC_CD_FCLK);
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#ifdef DEBUG
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pr_info("GPMC CS%d CLK period is %lu ns (div %d)\n",
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