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drm: Add 800x600 (SVGA) screen resolution to the built-in EDIDs
The 800x600 (SVGA) screen resolution was lacking in the set of built-in selectable EDID screen resolutions that can be used to repair misbehaving monitor firmware. This patch adds the related data set and expands the documentation. Note that the SVGA bit occupies a different byte to all the existing users of the established timing bits forcing a rework of the ESTABLISHED_TIMINGS_BITS macro. Tested new EDID on an aged (and misbehaving) industrial LCD panel; existing EDIDs still pass edid-decode's checksum checks. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: David Airlie <airlied@linux.ie> Cc: Carsten Emde <C.Emde@osadl.org> Cc: linux-doc@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -36,7 +36,7 @@
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#define DPI 72
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#define VFREQ 60 /* Hz */
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#define TIMING_NAME "Linux XGA"
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#define ESTABLISHED_TIMINGS_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */
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#define ESTABLISHED_TIMING2_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */
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#define HSYNC_POL 0
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#define VSYNC_POL 0
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#define CRC 0x55
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@ -36,7 +36,7 @@
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#define DPI 72
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#define VFREQ 60 /* Hz */
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#define TIMING_NAME "Linux SXGA"
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#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */
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/* No ESTABLISHED_TIMINGx_BITS */
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#define HSYNC_POL 1
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#define VSYNC_POL 1
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#define CRC 0xa0
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@ -36,7 +36,7 @@
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#define DPI 72
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#define VFREQ 60 /* Hz */
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#define TIMING_NAME "Linux UXGA"
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#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */
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/* No ESTABLISHED_TIMINGx_BITS */
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#define HSYNC_POL 1
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#define VSYNC_POL 1
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#define CRC 0x9d
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@ -36,7 +36,7 @@
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#define DPI 96
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#define VFREQ 60 /* Hz */
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#define TIMING_NAME "Linux WSXGA"
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#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */
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/* No ESTABLISHED_TIMINGx_BITS */
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#define HSYNC_POL 1
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#define VSYNC_POL 1
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#define CRC 0x26
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@ -36,7 +36,7 @@
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#define DPI 96
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#define VFREQ 60 /* Hz */
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#define TIMING_NAME "Linux FHD"
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#define ESTABLISHED_TIMINGS_BITS 0x00 /* none */
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/* No ESTABLISHED_TIMINGx_BITS */
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#define HSYNC_POL 1
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#define VSYNC_POL 1
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#define CRC 0x05
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41
Documentation/EDID/800x600.S
Normal file
41
Documentation/EDID/800x600.S
Normal file
@ -0,0 +1,41 @@
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/*
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800x600.S: EDID data set for standard 800x600 60 Hz monitor
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Copyright (C) 2011 Carsten Emde <C.Emde@osadl.org>
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Copyright (C) 2014 Linaro Limited
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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*/
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/* EDID */
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#define VERSION 1
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#define REVISION 3
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/* Display */
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#define CLOCK 40000 /* kHz */
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#define XPIX 800
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#define YPIX 600
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#define XY_RATIO XY_RATIO_4_3
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#define XBLANK 256
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#define YBLANK 28
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#define XOFFSET 40
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#define XPULSE 128
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#define YOFFSET (63+1)
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#define YPULSE (63+4)
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#define DPI 72
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#define VFREQ 60 /* Hz */
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#define TIMING_NAME "Linux SVGA"
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#define ESTABLISHED_TIMING1_BITS 0x01 /* Bit 0: 800x600 @ 60Hz */
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#define HSYNC_POL 1
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#define VSYNC_POL 1
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#define CRC 0xc2
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#include "edid.S"
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@ -18,7 +18,7 @@ CONFIG_DRM_LOAD_EDID_FIRMWARE was introduced. It allows to provide an
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individually prepared or corrected EDID data set in the /lib/firmware
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directory from where it is loaded via the firmware interface. The code
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(see drivers/gpu/drm/drm_edid_load.c) contains built-in data sets for
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commonly used screen resolutions (1024x768, 1280x1024, 1600x1200,
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commonly used screen resolutions (800x600, 1024x768, 1280x1024, 1600x1200,
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1680x1050, 1920x1080) as binary blobs, but the kernel source tree does
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not contain code to create these data. In order to elucidate the origin
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of the built-in binary EDID blobs and to facilitate the creation of
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@ -33,6 +33,17 @@
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#define XY_RATIO_5_4 0b10
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#define XY_RATIO_16_9 0b11
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/* Provide defaults for the timing bits */
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#ifndef ESTABLISHED_TIMING1_BITS
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#define ESTABLISHED_TIMING1_BITS 0x00
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#endif
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#ifndef ESTABLISHED_TIMING2_BITS
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#define ESTABLISHED_TIMING2_BITS 0x00
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#endif
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#ifndef ESTABLISHED_TIMING3_BITS
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#define ESTABLISHED_TIMING3_BITS 0x00
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#endif
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#define mfgname2id(v1,v2,v3) \
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((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f))
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#define swap16(v1) ((v1>>8)+((v1&0xff)<<8))
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@ -139,7 +150,7 @@ white_x_y_msb: .byte 0x50,0x54
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Bit 2 640x480 @ 75 Hz
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Bit 1 800x600 @ 56 Hz
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Bit 0 800x600 @ 60 Hz */
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estbl_timing1: .byte 0x00
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estbl_timing1: .byte ESTABLISHED_TIMING1_BITS
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/* Bit 7 800x600 @ 72 Hz
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Bit 6 800x600 @ 75 Hz
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@ -149,11 +160,11 @@ estbl_timing1: .byte 0x00
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Bit 2 1024x768 @ 72 Hz
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Bit 1 1024x768 @ 75 Hz
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Bit 0 1280x1024 @ 75 Hz */
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estbl_timing2: .byte ESTABLISHED_TIMINGS_BITS
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estbl_timing2: .byte ESTABLISHED_TIMING2_BITS
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/* Bit 7 1152x870 @ 75 Hz (Apple Macintosh II)
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Bits 6-0 Other manufacturer-specific display mod */
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estbl_timing3: .byte 0x00
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estbl_timing3: .byte ESTABLISHED_TIMING3_BITS
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/* Standard timing */
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/* X resolution, less 31, divided by 8 (256-2288 pixels) */
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@ -31,8 +31,9 @@ module_param_string(edid_firmware, edid_firmware, sizeof(edid_firmware), 0644);
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MODULE_PARM_DESC(edid_firmware, "Do not probe monitor, use specified EDID blob "
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"from built-in data or /lib/firmware instead. ");
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#define GENERIC_EDIDS 5
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#define GENERIC_EDIDS 6
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static const char *generic_edid_name[GENERIC_EDIDS] = {
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"edid/800x600.bin",
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"edid/1024x768.bin",
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"edid/1280x1024.bin",
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"edid/1600x1200.bin",
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@ -41,6 +42,24 @@ static const char *generic_edid_name[GENERIC_EDIDS] = {
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};
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static const u8 generic_edid[GENERIC_EDIDS][128] = {
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{
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0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
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0x31, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x05, 0x16, 0x01, 0x03, 0x6d, 0x1b, 0x14, 0x78,
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0xea, 0x5e, 0xc0, 0xa4, 0x59, 0x4a, 0x98, 0x25,
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0x20, 0x50, 0x54, 0x01, 0x00, 0x00, 0x45, 0x40,
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0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
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0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0xa0, 0x0f,
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0x20, 0x00, 0x31, 0x58, 0x1c, 0x20, 0x28, 0x80,
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0x14, 0x00, 0x15, 0xd0, 0x10, 0x00, 0x00, 0x1e,
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0x00, 0x00, 0x00, 0xff, 0x00, 0x4c, 0x69, 0x6e,
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0x75, 0x78, 0x20, 0x23, 0x30, 0x0a, 0x20, 0x20,
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0x20, 0x20, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x3b,
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0x3d, 0x24, 0x26, 0x05, 0x00, 0x0a, 0x20, 0x20,
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0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xfc,
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0x00, 0x4c, 0x69, 0x6e, 0x75, 0x78, 0x20, 0x53,
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0x56, 0x47, 0x41, 0x0a, 0x20, 0x20, 0x00, 0xc2,
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},
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{
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0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
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0x31, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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