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ARM: dts: am43x-clock: add tbclk data for ehrpwm
We need "tbclk" clock data for the functioning of ehrpwm module. Hence, populating the required clock information in clock dts file. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
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@ -87,6 +87,54 @@
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clock-mult = <1>;
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clock-div = <1>;
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};
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ehrpwm0_tbclk: ehrpwm0_tbclk {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_m2_ck>;
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ti,bit-shift = <0>;
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reg = <0x0664>;
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};
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ehrpwm1_tbclk: ehrpwm1_tbclk {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_m2_ck>;
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ti,bit-shift = <1>;
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reg = <0x0664>;
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};
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ehrpwm2_tbclk: ehrpwm2_tbclk {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_m2_ck>;
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ti,bit-shift = <2>;
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reg = <0x0664>;
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};
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ehrpwm3_tbclk: ehrpwm3_tbclk {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_m2_ck>;
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ti,bit-shift = <4>;
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reg = <0x0664>;
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};
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ehrpwm4_tbclk: ehrpwm4_tbclk {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_m2_ck>;
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ti,bit-shift = <5>;
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reg = <0x0664>;
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};
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ehrpwm5_tbclk: ehrpwm5_tbclk {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&dpll_per_m2_ck>;
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ti,bit-shift = <6>;
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reg = <0x0664>;
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};
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};
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&prcm_clocks {
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clk_32768_ck: clk_32768_ck {
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@ -105,6 +105,12 @@ static struct ti_dt_clk am43xx_clks[] = {
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DT_CLK(NULL, "func_12m_clk", "func_12m_clk"),
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DT_CLK(NULL, "vtp_clk_div", "vtp_clk_div"),
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DT_CLK(NULL, "usbphy_32khz_clkmux", "usbphy_32khz_clkmux"),
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DT_CLK("48300200.ehrpwm", "tbclk", "ehrpwm0_tbclk"),
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DT_CLK("48302200.ehrpwm", "tbclk", "ehrpwm1_tbclk"),
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DT_CLK("48304200.ehrpwm", "tbclk", "ehrpwm2_tbclk"),
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DT_CLK("48306200.ehrpwm", "tbclk", "ehrpwm3_tbclk"),
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DT_CLK("48308200.ehrpwm", "tbclk", "ehrpwm4_tbclk"),
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DT_CLK("4830a200.ehrpwm", "tbclk", "ehrpwm5_tbclk"),
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{ .node_name = NULL },
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};
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