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[MIPS] cleanup struct irqaction initializers

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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
CC: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thomas Gleixner 2007-08-28 09:03:01 +00:00 committed by Ralf Baechle
parent 1c0c13eb93
commit 4e45171c4e
5 changed files with 30 additions and 12 deletions
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4
arch/mips/cobalt/irq.c
View File

@ -92,7 +92,9 @@ asmlinkage void plat_irq_dispatch(void)
}
static struct irqaction irq_via = {
no_action, 0, { { 0, } }, "cascade", NULL, NULL
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "cascade"
};
void __init arch_init_irq(void)

8
arch/mips/jmr3927/rbhma3100/irq.c
View File

@ -104,7 +104,9 @@ static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
}
static struct irqaction ioc_action = {
jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL,
.handler = jmr3927_ioc_interrupt,
.mask = CPU_MASK_NONE,
.name = "IOC",
};
static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
@ -116,7 +118,9 @@ static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
static struct irqaction pcierr_action = {
jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL,
.handler = jmr3927_pcierr_interrupt,
.mask = CPU_MASK_NONE,
.name = "PCI error",
};
static void __init jmr3927_irq_init(void);

4
arch/mips/kernel/i8259.c
View File

@ -303,7 +303,9 @@ void init_8259A(int auto_eoi)
* IRQ2 is cascade interrupt to second interrupt controller
*/
static struct irqaction irq2 = {
no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "cascade",
};
static struct resource pic1_io_resource = {

16
arch/mips/sgi-ip32/ip32-irq.c
View File

@ -117,10 +117,18 @@ static void inline flush_mace_bus(void)
extern irqreturn_t crime_memerr_intr(int irq, void *dev_id);
extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED,
CPU_MASK_NONE, "CRIME memory error", NULL, NULL };
struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED,
CPU_MASK_NONE, "CRIME CPU error", NULL, NULL };
struct irqaction memerr_irq = {
.handler = crime_memerr_intr,
.flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
.name = "CRIME memory error",
};
struct irqaction cpuerr_irq = {
.handler = crime_cpuerr_intr,
.flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
.name = "CRIME CPU error",
};
/*
* For interrupts wired from a single device to the CPU. Only the clock

10
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
View File

@ -243,10 +243,12 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
return (sw_irq);
}
//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
static struct irqaction toshiba_rbtx4927_irq_ioc_action =
TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
.handler = no_action,
.flags = IRQF_SHARED,
.mask = CPU_MASK_NONE,
.name = TOSHIBA_RBTX4927_IOC_NAME
};
/**********************************************************************************/