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EDAC, skx_edac: Add EDAC driver for Skylake
This is an entirely new driver instead of yet another set of patches to sb_edac.c because: 1) Mapping from PCI devices to socket/memory controller is significantly different. Skylake scatters devices on a socket across a number of PCI buses. 2) There is an extra level of interleaving via the "mcroute" register that would be a little messy to squeeze into the old driver. 3) Validation is getting too expensive. Changes to sb_edac need to be checked against Sandy Bridge, Ivy Bridge, Haswell, Broadwell and Knights Landing. Acked-by: Aristeu Rozanski <aris@redhat.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -4525,6 +4525,12 @@ L: linux-edac@vger.kernel.org
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S: Maintained
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F: drivers/edac/sb_edac.c
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EDAC-SKYLAKE
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M: Tony Luck <tony.luck@intel.com>
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L: linux-edac@vger.kernel.org
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S: Maintained
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F: drivers/edac/skx_edac.c
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EDAC-XGENE
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APPLIED MICRO (APM) X-GENE SOC EDAC
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M: Loc Ho <lho@apm.com>
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@ -251,6 +251,14 @@ config EDAC_SBRIDGE
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Support for error detection and correction the Intel
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Sandy Bridge, Ivy Bridge and Haswell Integrated Memory Controllers.
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config EDAC_SKX
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tristate "Intel Skylake server Integrated MC"
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depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL
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depends on PCI_MMCONFIG
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help
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Support for error detection and correction the Intel
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Skylake server Integrated Memory Controllers.
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config EDAC_MPC85XX
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tristate "Freescale MPC83xx / MPC85xx"
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depends on EDAC_MM_EDAC && FSL_SOC
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@ -31,6 +31,7 @@ obj-$(CONFIG_EDAC_I5400) += i5400_edac.o
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obj-$(CONFIG_EDAC_I7300) += i7300_edac.o
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obj-$(CONFIG_EDAC_I7CORE) += i7core_edac.o
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obj-$(CONFIG_EDAC_SBRIDGE) += sb_edac.o
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obj-$(CONFIG_EDAC_SKX) += skx_edac.o
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obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
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obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
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obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o
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1121
drivers/edac/skx_edac.c
Normal file
1121
drivers/edac/skx_edac.c
Normal file
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