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drm/tegra: hdmi: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents. The HDMI registers are 32 bits wide irrespective of the architecture's data width. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -31,7 +31,7 @@ struct tegra_hdmi_config {
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unsigned int num_tmds;
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unsigned long fuse_override_offset;
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unsigned long fuse_override_value;
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u32 fuse_override_value;
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bool has_sor_io_peak_current;
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};
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@ -85,16 +85,16 @@ enum {
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HDA,
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};
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static inline unsigned long tegra_hdmi_readl(struct tegra_hdmi *hdmi,
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unsigned long reg)
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static inline u32 tegra_hdmi_readl(struct tegra_hdmi *hdmi,
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unsigned long offset)
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{
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return readl(hdmi->regs + (reg << 2));
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return readl(hdmi->regs + (offset << 2));
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}
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static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, unsigned long val,
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unsigned long reg)
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static inline void tegra_hdmi_writel(struct tegra_hdmi *hdmi, u32 value,
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unsigned long offset)
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{
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writel(val, hdmi->regs + (reg << 2));
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writel(value, hdmi->regs + (offset << 2));
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}
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struct tegra_hdmi_audio_config {
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@ -455,8 +455,8 @@ static void tegra_hdmi_setup_audio_fs_tables(struct tegra_hdmi *hdmi)
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for (i = 0; i < ARRAY_SIZE(freqs); i++) {
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unsigned int f = freqs[i];
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unsigned int eight_half;
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unsigned long value;
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unsigned int delta;
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u32 value;
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if (f > 96000)
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delta = 2;
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@ -477,7 +477,7 @@ static int tegra_hdmi_setup_audio(struct tegra_hdmi *hdmi, unsigned int pclk)
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struct device_node *node = hdmi->dev->of_node;
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const struct tegra_hdmi_audio_config *config;
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unsigned int offset = 0;
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unsigned long value;
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u32 value;
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switch (hdmi->audio_source) {
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case HDA:
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@ -571,9 +571,9 @@ static int tegra_hdmi_setup_audio(struct tegra_hdmi *hdmi, unsigned int pclk)
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return 0;
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}
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static inline unsigned long tegra_hdmi_subpack(const u8 *ptr, size_t size)
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static inline u32 tegra_hdmi_subpack(const u8 *ptr, size_t size)
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{
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unsigned long value = 0;
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u32 value = 0;
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size_t i;
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for (i = size; i > 0; i--)
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@ -587,8 +587,8 @@ static void tegra_hdmi_write_infopack(struct tegra_hdmi *hdmi, const void *data,
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{
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const u8 *ptr = data;
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unsigned long offset;
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unsigned long value;
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size_t i, j;
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u32 value;
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switch (ptr[0]) {
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case HDMI_INFOFRAME_TYPE_AVI:
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@ -707,9 +707,9 @@ static void tegra_hdmi_setup_audio_infoframe(struct tegra_hdmi *hdmi)
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static void tegra_hdmi_setup_stereo_infoframe(struct tegra_hdmi *hdmi)
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{
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struct hdmi_vendor_infoframe frame;
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unsigned long value;
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u8 buffer[10];
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ssize_t err;
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u32 value;
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if (!hdmi->stereo) {
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value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
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@ -738,7 +738,7 @@ static void tegra_hdmi_setup_stereo_infoframe(struct tegra_hdmi *hdmi)
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static void tegra_hdmi_setup_tmds(struct tegra_hdmi *hdmi,
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const struct tmds_config *tmds)
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{
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unsigned long value;
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u32 value;
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tegra_hdmi_writel(hdmi, tmds->pll0, HDMI_NV_PDISP_SOR_PLL0);
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tegra_hdmi_writel(hdmi, tmds->pll1, HDMI_NV_PDISP_SOR_PLL1);
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@ -776,8 +776,8 @@ static int tegra_output_hdmi_enable(struct tegra_output *output)
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struct tegra_hdmi *hdmi = to_hdmi(output);
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struct device_node *node = hdmi->dev->of_node;
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unsigned int pulse_start, div82, pclk;
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unsigned long value;
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int retries = 1000;
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u32 value;
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int err;
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if (hdmi->enabled)
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@ -1011,7 +1011,7 @@ static int tegra_output_hdmi_disable(struct tegra_output *output)
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{
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struct tegra_dc *dc = to_tegra_dc(output->encoder.crtc);
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struct tegra_hdmi *hdmi = to_hdmi(output);
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unsigned long value;
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u32 value;
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if (!hdmi->enabled)
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return 0;
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@ -1117,8 +1117,8 @@ static int tegra_hdmi_show_regs(struct seq_file *s, void *data)
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return err;
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#define DUMP_REG(name) \
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seq_printf(s, "%-56s %#05x %08lx\n", #name, name, \
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tegra_hdmi_readl(hdmi, name))
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seq_printf(s, "%-56s %#05x %08x\n", #name, name, \
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tegra_hdmi_readl(hdmi, name))
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DUMP_REG(HDMI_CTXSW);
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DUMP_REG(HDMI_NV_PDISP_SOR_STATE0);
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