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crypto: qat - Fixed SKU1 dev issue
Fix for issue with SKU1 device. SKU1 device has 8 micro engines as opposed to 12 in other SKUs so it was not possible to start the non-existing micro engines. Signed-off-by: Bo Cui <bo.cui@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -256,10 +256,6 @@ static int qat_uclo_fetch_initmem_ae(struct icp_qat_fw_loader_handle *handle,
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pr_err("QAT: Parse num for AE number failed\n");
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return -EINVAL;
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}
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if (!test_bit(*ae, (unsigned long *)&handle->hal_handle->ae_mask)) {
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pr_err("QAT: ae %d to be init is fused off\n", *ae);
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return -EINVAL;
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}
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if (*ae >= ICP_QAT_UCLO_MAX_AE) {
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pr_err("QAT: ae %d out of range\n", *ae);
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return -EINVAL;
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@ -456,7 +452,7 @@ static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle)
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(sizeof(struct icp_qat_uof_memvar_attr) *
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initmem->val_attr_num));
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}
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for (ae = 0; ae < ICP_QAT_UCLO_MAX_AE; ae++) {
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for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
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if (qat_hal_batch_wr_lm(handle, ae,
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obj_handle->lm_init_tab[ae])) {
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pr_err("QAT: fail to batch init lmem for AE %d\n", ae);
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@ -59,7 +59,7 @@
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#define ADF_DH895XCC_FUSECTL_SKU_4 0x3
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#define ADF_DH895XCC_MAX_ACCELERATORS 6
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#define ADF_DH895XCC_MAX_ACCELENGINES 12
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#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 18
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#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 13
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#define ADF_DH895XCC_ACCELERATORS_MASK 0x3F
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#define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF
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#define ADF_DH895XCC_LEGFUSE_OFFSET 0x4C
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